This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported

The following features are enabled in configuration but not fully tested:
 I2C (used to get the board revision)
 I2C-connected RTC
 VSC7385 switch

There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...
Signed-off-by: NWolfgang Denk <wd@denx.de>
Acked-by: NMike Frysinger <vapier@gentoo.org>

Instead of defining the flags sevaral times in different source files
(which is error prone), move them to a central place in a header file.
Signed-off-by: NWolfgang Denk <wd@denx.de>

Change the return type of the *printf() functions to the standard
"int"; no changes are needed but returning the already available
length count.

This will save a few additional strlen() calls later...
Signed-off-by: NWolfgang Denk <wd@denx.de>

Also get rid of the #ifdef's while doing this.
Suggested-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Remove some INFERNO related #ifdef's from common environment code by
fixing the board configuration settings (add CONFIG_ENV_SECT_SIZE).

While we are at it, fix comment which incorrectly talks about 4 KB
environment size, while it's actually 0x4000 = 16 KiB.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Rolf Offermanns <rof@sysgo.de>

Fix board directory name for ML2 board, and
add missing definitions for am3517_evm and s5p_goni boards.
Signed-off-by: NWolfgang Denk <wd@denx.de>

This patch adds support for the T3CORP board, based on the
AppliedMicro (APM) PPC460GT.
Signed-off-by: NStefan Roese <sr@denx.de>

Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.

This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
  defined in the top of this file. This way, we can remove an ugly
  #ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
  statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.
Signed-off-by: NStefan Roese <sr@denx.de>

This patch adds some DDR(2) macros to all PPC4xx's equipped with
this IBM DDR1/2 controller.
Signed-off-by: NStefan Roese <sr@denx.de>

As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.
Signed-off-by: NStefan Roese <sr@denx.de>

This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.

This feature will be used by an upcoming PPC460GT board port.
Signed-off-by: NStefan Roese <sr@denx.de>

By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.

This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.
Signed-off-by: NStefan Roese <sr@denx.de>

This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.
Signed-off-by: NStefan Roese <sr@denx.de>

At the moment, the default SPI flash subsystem is quite terse.  Errors and
successes both result in a generic message.  So move the useful errors and
useful successes to printf output by default.

While we're here, also convert the messages to use print_size().
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Some old STMicro parts do not support JEDEC ID (0x9f). This patch
uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Acked-by: NMike Frysinger <vapier@gentoo.org>

This patch adds redundant environment for environment in SPI flash.
I took env_flash.c as an example and slightly modified it. Apart
from adapting things to SF, I also slightly changed the decision
logic to use area 2 as a default in case the flags are wrong because
not having a default path worried me.

I did not add a section for CONFIG_ENV_IS_IN_SPI_FLASH in environment.h
because I did not understand if this is desired and/or needed.
So to use the feature, one has to set CONFIG_ENV_OFFSET_REDUND _and_
CONFIG_SYS_REDUNDAND_ENVIRONMENT.

I checked it by powering off my board several times during flash
erase or write, because I do not know if there are other stress
test scenarios.
Signed-off-by: NWolfgang Wegner <w.wegner@astro-kom.de>
Acked-by: NMike Frysinger <vapier@gentoo.org>

This avoids a build warning that you see if anyone in the
header chain has included io.h (which is coming shortly).  The previous
code redefined readl/writel; this patch renames it to be specific to
ohci.  The defines are also moved from ohci-hcd.c to ohci.h.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>

OMAP3EVM Rev >=E uses external Vbus supply so setting 'extvbus'
to '1' for OMAP3EVM Rev >=E runtime based on EVM revision.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>

Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.

Rev A to D : 0x01150000
Rev >= E   : 0x92200000

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: NSandeep Paulraj <s-paulraj@ti.com>

MUSB PHY on OMAP3EVM Rev >= E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.

Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.

Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>

Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>

Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.

Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.
Signed-off-by: NSergey Matyukevich <geomatsi@gmail.com>

Update CHANGELOG
Signed-off-by: NWolfgang Denk <wd@denx.de>

This also uses the breadcrumb register as on MPC5200.
Signed-off-by: NMichael Weiss <michael.weiss@ifm.com>
Signed-off-by: NDetlev Zundel <dzu@denx.de>

r12 is used for accessing the GOT not r14. Fix this in the
comment.
Signed-off-by: NHeiko Schocher <hs@denx.de>

We were missing 8641HPCN_36BIT and MPC8536DS_36BIT.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>

Fix following warnings:

$ ./MAKEALL EVB64260 P3G4 ZUMA
Configuring for EVB64260 board...
mpsc.c: In function 'mpsc_putchar_early':
mpsc.c:121: warning: dereferencing type-punned pointer will break strict-aliasing rules
mpsc.c:127: warning: dereferencing type-punned pointer will break strict-aliasing rules
...
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI
specification suggests) which leads to the controller seeing the "token" field
as the previous call has left it, i.e.:
- if a timeout occured on the previous call (Active bit left as 1), controller
  incorrectly tries to complete a previous transaction on a newly programmed
  endpoint;
- if a halt occured on the previous call (Halted bit set to 1), controller just
  ignores the newly programmed TD(s) and the function then keeps returning error
  ad infinitum.

This turned out to be caused by the wrong orger of the arguments to the memset()
call in ehci_alloc(), so the allocated TDs weren't cleared either.

While at it, stop needlessly initializing the alternate next TD pointer in the
QH transfer overlay...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: NRemy Bohmer <linux@bohmer.net>

The console_buffer size is declared in common/main.c as
   -- char console_buffer[CONFIG_SYS_CBSIZE + 1];
so this extern definition is wrong.
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

- Also modified the code to use io accessors.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NDipen Dudhat <dipen.dudhat@freescale.com>
Acked-by: NKumar Gala <galak@kernel.crashing.org>