This patch throws an error if 64-bit support is expected
but DMA hardware is not capable of 64-bit support. It also
prints a debug message if DMA is capable of 64-bit but not
using it.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

This patch adds 64-bit addressing support for zynq gem.
This means it can perform send and receive operations on
64-bit address buffers.
Signed-off-by: NVipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
	CONFIG_ZYNQ_GEM_EEPROM_ADDR
	CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)

Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff170000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

For testing purpose use zcu100 which has SD at controller 0 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100)

Model: ZynqMP MINI EMMC0
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff160000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

If only usb ethernet gadget is enabled it can start automatically.
If more gagdets are enabled usb ethernet gadget can be bind by
"bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100)
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This configuration is useful when you want to run small u-boot and
perform DDR memory test to make sure that DDR is properly configured.
It is use for board bringup because alternative u-boot memory tests is
quite good.
Configuration is running out of OCM.

As is done for others mini configurations 0x80 bytes for variables is
enough and only default variables are stored there.

Alternative memtest is enabled and also 2GB of DDR via DTS files.
Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init()
from zcu102 for testing purpose.
In case of size issue this can be moved to SPL configuration as is done
for mini_qspi configuration but it is not a problem now.

Log:
U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100)

Model: ZynqMP MINI
Board: Xilinx ZynqMP
DRAM:  WARNING: Initializing TCM overwrites TCM content
2 GiB
EL Level:       EL3
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no reason to have huge space for variables because none is
using that. But there are some which are setup automatically.

baudrate=115200
fdtcontroladdr=ffffa0d0
stderr=dcc
stdin=dcc
stdout=dcc

Environment size: 72/124 bytes
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

No reason to save this data to environment.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

No reason to save additional variables to environment for mini
configurations.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no need to waste a space for setting up bootcommand which is
passed via xilinx_zynqmp.h by including "config_distro_bootcmd.h"
header.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Wire up mini_qspi SPL with zcu102 for testing purpose.
Normally mini u-boot runs with FSBL/SPL for certain board.
Enabling SPL and configuration from zcu102 helps with testing.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no reason to have autoboot enabled because it should never
start anything automatically.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no need to waste 6k if none needs it.

zynq_cse_nand  : all -6486 bss -20 data -136 rodata -606 text -5724
zynq_cse_nor   : all -6486 bss -20 data -136 rodata -606 text -5724
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

mtest is being checked by test/py framework and this test should run at
least on one platform that's why enabling mtest on zc702.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

These symlinks are here only for testing purpose where SPL is used
for soc configuration.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

If there are more instances of si570 clock-output-names property
should be used for differentiation of clock output.
The patch is adding this optional properties for all zynqmp boards with
si570 chip.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This chip is on the board but handling should be done via firmware not
via Linux driver. Changing status property to keep it in the tree to
describe it instead of removing this node completely.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing clocks property.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable reading tx and rx buswidth from DT via spi-uclass.
To get these from uclass spi-flash compatible string has to be added
to flash node.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

DC4 board has qspi on it hence define and enable
qspi node for it.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

BSS section was all the time separated for SPL but this symbol wasn't
enabled. It is necessary to have it enabled for OF_SEPARATE
configuration where DTB is appended to u-boot with DTB.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Show information about board read from DT by default to know what board
U-Boot is running at.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The standard function is less error prone than custom one.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Make sense to add controller ID to model name to have it visible through
the logs to know which controller is used by which configuration.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no reason to enable these commands for mini configurations.
It saves some space:
   aarch64: (for 2/2 boards) all -19076.0 bss -1048.0 data -1720.0
rodata -3840.0 text -12468.0
            xilinx_zynqmp_mini_emmc1: all -19076 bss -1048 data -1720
rodata -3840 text -12468
            xilinx_zynqmp_mini_emmc0: all -19076 bss -1048 data -1720
rodata -3840 text -12468
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

U-Boot is growing that's why not needed features can be disabled:
- CMDLINE_EDITING
- AUTO_COMPLETE
- SYS_LONGHELP
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Intention of CSE targets is not boot anything that's why also bootdelay
is not necessary
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

cse targets shouldn't never have distro default enabled because these
targets are not designed for booting images.

It was enabled by:
"configs: Re-sync with CONFIG_DISTRO_DEFAULTS"
(sha1: fa2c1467)
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

If SYS_LONGHELP is disabled the following warning is generated:
board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but
not used [-Wunused-variable]

Normal way for fixing this is to guard the whole variable.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for disabling subpage write support via
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE.

Currently the Linux Arasan driver does not support subpage writes and in
case of running UBI and accessing the same UBI volume from both U-Boot
and Linux it is required to have the same subpage write configuration
else the location of the UBI headers (EC + VID) will be misaligned
(subpage vs page) and incompatible. Hence the need for disabling
subpage write support in the U-Boot Arasan NAND driver.
Signed-off-by: NMartin Lund <malu@gomspace.com>
Acked-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

spi-rx-bus-width property is part of flash, so it should be moved
to flash node from qspi node. This patch fixes the incorrect read
of spi-rx-bus-width property by moving it to flash node.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The VCU disable bit(8) in IP disable register of efuse
is valid only if PL powered up and hence PL powerup status
has to be considered while determining the CG part also.
This patch considers the PL powerup status and ignores the VCU
disable bit if PL not powered up.
This fixes the issue of "unknown" id for CG parts if PL not powered up
and VCU bit(8) is not set.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Various minor sandbox improvements
Better buildman warning handling
Misc other things

It is useful to obtain the block-protect setting of the SPI flash, so we
know whether it is fully open or (perhaps partially) write-protected. Add
a method for this. Update the sandbox driver to process this operation and
add a test.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The current test is a functional test, covering all the way from the
command line to the sandbox SPI driver. This is useful, but it is easier
to diagnose failures with a smaller test.

Add a simple test which reads and writes data and checks that it is stored
and retrieved correctly.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present these functions return 0 on success. For some devices we want
to know how many bytes were transferred. It seems useful to adjust the API
to be more like the POSIX read() and write() functions.

Update these two methods, a test and all users.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>

At present the config header is not included in this file, but it does use
a CONFIG option. Fix it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

It is useful to be able to invert the colours in some cases so that the
text matches the background colour. Add a parameter to the function to
support this.

It is strange that function takes a private data structure from another
driver as an argument. It seems better to pass the device and have the
function internally work out how to find its required information.
Signed-off-by: NSimon Glass <sjg@chromium.org>