Debug message was showing timeout value which was passed to start
function but there is a checking if this value can be setup.
The patch is moving this debug printf function below checking.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch adds support for 16-bit buswidth by determining
the bus width based on mio configuration.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Point to Zynqmp arm64 cpu folder not to Zynq arm32.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no need to have arm hardware header in this driver.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This driver was tested on Xilinx ZynqMP SoC.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch removes UBI support from defconfig and it can
be enabled from menuconfig as per need.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch enables support zc1275 revB board. It has
SD added compared to revA. The same configuration will
work for RevC boards aswell.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

In v2018 the patch
"dm: ahci: Correct uclass private data"
(sha1: bfc1c6b4)
was causing an issue for ceva_sata.
But this issue is not in v2018.05-rc1 but still converting to
UCLASS_AHCI would make more sense.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

CPU:   Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C:   ready

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>,
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

mini configuration doesn't need to show this information.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

In past this code was commented and was used for debug purpose.
But there is no reason not to enabled it based on macros.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch solves assert failed displayed in the console during a boot.
The root cause is that the ubifs_inode is not already allocated when
ubifs_printdir and ubifs_finddir functions are called.

Trace showing the issue:
feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece
dent->ch.sqnum '7132', creat_sqnum 3886945402880
UBIFS assert failed in ubifs_finddir at 436
INODE ALLOCATION: creat_sqnum '7129'
Found U-Boot script /boot.scr.uimg
Signed-off-by: NChristophe Kerello <christophe.kerello@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

In do_bootm_states when doing BOOTM_STATE_LOADOS we use load_end
uninitialized and Coverity notes this now.  This however leads down
another interesting path.  We pass this pointer to bootm_load_os and
that in turn uses this uninitialized value immediately to calculate the
flush length, and is wrong.  We do not know what load_end will be until
after bootm_decomp_image is called, so we must only set flush_len after
that.  All of this also makes it clear that the only reason we pass a
pointer for load_end to bootm_load_os is so that we can call lmb_reserve
on success.  Rather than initialize load_end to 0 in do_bootm_states we
can just call lmb_reserve ourself.

Reported-by: Coverity (CID: 175572)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The signature/hash information are displayed for images but nor for
configurations.

Add subnodes printing in fit_conf_print() like it's done in fit_image_print()
Signed-off-by: NClément Péron <peron.clem@gmail.com>
[trini: Add guards around fit_conf_print to avoid warnings]
Signed-off-by: NTom Rini <trini@konsulko.com>

find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process

static inline int find_next_zero_bit(void *addr, int size, int offset)
{
	unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
	unsigned long result = offset & ~31UL;
	unsigned long tmp;

	if (offset >= size)
		return size;
	size -= result;
	offset &= 31UL;
	if (offset) {
		tmp = *(p++);
		tmp |= ~0UL >> (32-offset);
		if (size < 32)
[1]
			goto found_first;
		if (~tmp)
			goto found_middle;
		size -= 32;
		result += 32;
	}
	while (size & ~31UL) {
		tmp = *(p++);
		if (~tmp)
			goto found_middle;
		result += 32;
		size -= 32;
	}
[2]
	if (!size)
		return result;
	tmp = *p;

found_first:
[3]  tmp |= ~0UL >> size;

^^^ algo can reach above line from from points:
 [1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1
 [2] size < 32 - rest of bits to process
 in both cases bits to search are tmp[size-1..0], but line [3] will simply
 set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail.

example: bitmap size = 16, offset = 0, bitmap is empty.
 code will go through the point [2], tmp = 0x0
 after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16.

found_middle:
	return result + ffz(tmp);
}

Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3].

Fixes: 81e9fe5a ("arm: implement find_next_zero_bit function")
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>

Add an 'adc' cli command to get information from adc devices and to read
"single shot" data.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Declaration of indirect PCI bridges is not compatible with DM: Both
define PCI operations, but in different ways. Hence, don't use indirect
bridges if DM is active.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a driver for RXAUI control on IHS FPGAs.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

To prepare for DM conversion, encapsulate all register accesses in
function calls.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

The clock node is used by the serial driver and it's needed
before relocation.
This patch ensures that the msm-serial driver can actually
use the clock node.
Signed-off-by: NRamon Fried <ramon.fried@linaro.org>

STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs.
As currently no U-boot driver is available for the USB3 PHY and to avoid
issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY
using stih410-b2260-u-boot.dtsi file.

Fixes: 2fd4242c ("ubs: xhci-dwc3: Enable USB3 PHY when available")
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Eliminate code duplication: the same PARTS_DEFAULT was defined in
am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and
use in all OMAP5-based boards.
Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org>

The overlay code is only useful when OF_LIBFDT is set, so mark it as
depending on that first.
Signed-off-by: NTom Rini <trini@konsulko.com>

This patch adds the driver for the Amlogic Meson Successive Approximation
Register (SAR) A/D Converter based on the Linux IIO driver thanks to the
great work of Martin Blumenstingl.
The driver has been adapted to U-Boot and the ADC UClass.

This patch depends on the regmap "regmap: add regmap_update_bits() helper"
patch and has been tested using the newly introducted "adc" CLI command
in the "cmd: add ADC cli commands" patch.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Add calls to regmap_read/modify_bits/write even if the proper memory
read/write calls are not executed in sandbox.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Enable vrefbuf on stm32mp15, to be used by ADC.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Add VREF clock gating, that may be used by STM32 VREFBUF regulator.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Add regulator driver for STM32 voltage reference buffer which can be
used as voltage reference for ADCs, DACs and external components through
dedicated VREF+ pin.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Enable DM_REGULATOR_STPMU1 flag to activate regulator
driver for STM32MP15 SoC and CMD_REGULATOR flag to be
able to set/get regulator state int U-boot command line.

Disable PMIC_CHILDREN as this flag is not needed in SPL
for STM32MP1.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.
Signed-off-by: NChristophe Kerello <christophe.kerello@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>