- 04 9月, 2015 11 次提交
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由 Dinh Nguyen 提交于
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is also supported. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Add support for DENX MCV SoM, which is CycloneV based and the associated DENX MCVEVK baseboard. The board can boot from eMMC. Ethernet and USB is supported. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
Add support for Terasic SoCkit, which is CycloneV based board. The board can boot either from SD/MMC or QSPI. Ethernet is also supported. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the SoCFPGA SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
The CONFIG_OF_CONTROL and CONFIG_SPL_OF_CONTROL is always enabled on Altera SoCFPGA, remove the unnecessary checks. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
The SoCFPGA probes mostly from OF and the OF is mandatory both in U-Boot itself and U-Boot SPL. Enable it by default. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
This fix makes sure that the ISWGRP0 and ISWGRP1 registers are correctly inited. In case those registers are not initialized, it is not possible to access the registers synthesised in the FPGA through the bridges. Any such access produces data abort. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
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由 Stefan Brüns 提交于
Signed-off-by: NStefan Brüns <stefan.bruens@rwth-aachen.de>
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由 Stefan Brüns 提交于
The default config includes base.menu, not linux.list Signed-off-by: NStefan Brüns <stefan.bruens@rwth-aachen.de>
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- 03 9月, 2015 29 次提交
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由 Simon Glass 提交于
It is easier to paste these into the command line if they are a single common. Use line continuation instead of separate lines. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
MMC support works now, so it can be dropped from the todo Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
Instead of creating a rockchip SPL SD card image with 32KB of zeros which can be written to the start of an SD card, create the images with only the useful data that should be written to an offset of 32KB on the SD card. The first 32 kilobytes aren't needed for bootup and only serve as convenient way of accidentally obliterating your partition table. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
Booting the kernel fails on RK3288 (and probably other rockchip SoCs) when the i-cache is disabled/flushed before d-cache. I have not investigated whether this is due to U-Boot hanging or whether it's very early in the linux boot, but following the approach of the various rockchip U-Boot forks (first disable d-cache then i-cache) makes things work. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
Now that MMC works in U-Boot add config distro command support to start Linux in a standard fashion. One oddity here is that linux fails to load when the fdt is relocated to above 512MB, so set fdt_high to make sure it's loaded below that. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
With LED support enabled the SPL easily goes over the size limit (e.g. with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support in the SPL to reduce the size just enough for those compilers. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Tweaked commit subject to remove _SUPPORT Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
U-Boot can't use the sdio card so turn it of to prevent things getting confused/struck when trying to use the card as storage. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
During mmc initialize probe all devices with the MMC Uclass if build with CONFIG_DM_MMC Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Sjoerd Simons 提交于
The Radxa Rock pro board is rk3188 based and thus won't work with U-Boot built for RK3288. Change the documentation to refer to the intended board, the Radxa Rock 2, which is an RK3288-based design very similar to the firefly Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a few notes on how to try out the Rockchip support so far. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This builds and displays an SPL message, but does not function beyond that. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add an I2C driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add code for starting up U-Boot SPL and U-Boot proper. This is generic and makes use of devices provided by the board- or SoC-specific code. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add an MMC driver which supports RK3288, but may also support other SoCs. It uses the Designware MMC device. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a driver which supports pin multiplexing setup for the most commonly used peripherals. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a driver that provides access to system controllers. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
We can reset the SoC using some CRU (clock/reset unit) registers. Add support for this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
PMU is the power management unit and GRF is the general register file. Both are heavily used in U-Boot. Add header files with register definitions. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3288. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a full regulator driver for the ACT8846. This provides easy access to voltage and current settings for each regulator. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and is connected to the I2C bus. This driver supports using a regulator driver to access the regulators. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This supports RK3288 at present. It does not implement functions or support for pull up/down. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The Rockchip boot ROM requires a particular file format for booting from SPI. It consists of a 512-byte header encoded with RC4, some padding and then up to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. This allows booting from SPI flash on supported machines. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The Rockchip boot ROM requires a particular file format. It consists of 64KB of zeroes, a 512-byte header encoded with RC4, and then some executable code. Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be converted to this format. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rockchip SoCs require certain formats for code that they execute, The simplest format is a 4-byte header at the start of a binary file. Add support for this so that we can create images that the boot ROM understands. Signed-off-by: NSimon Glass <sjg@chromium.org>
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