Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com>

This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.

At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixes and a few other things.

With video output support for the RK3399-Q7 (Puma) available, we want
CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs
defined.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- enable SYS_WHITE_ON_BLACK via defconfig
Reviewed-by: NSimon Glass <sjg@chromium.org>

The last set of rebases had dropped the 'grf' field from the common
rk_vop.  Add this back to un-break the build (and driver).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288.  As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).

Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.

Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part.  This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3288 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.

The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
  features/callbacks with the common driver: at this time, this is
  limited to a callback for setting the pin polarities (between the
  VOP and the encoder modules) and a flag to signal 10bit RGB
  capability
- refactors the probing of regulators into a helper function that
  can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
  used by the chip-specific drivers to provide base addresses to
  the common driver
- uses a callback into the chip-specific driver to set pin polarities
  (replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
  help function withint the common driver
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
 - VIDEO_ROCKCHIP_MAX_XRES
 - VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

For the RK3399-Q7, we need spl_board_init to be called during SPL
startup to set up the pinmux for the debug UART. Enable SPL_BOARD_INIT
via defconfig to ensure this function is in fact called.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit
0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and
introduces random delays and data lose.

This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
with the right shift.
Signed-off-by: NRomain Perier <romain.perier@collabora.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This adds the DDR3-1866 timing via its own DTS and wires it up.  This
(currently) is not the default timing for the RK3399-Q7 and should be
selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

This adds the DDR3-1333 timing via its own DTS and wires it up.  This
is not the default timing for the RK3399-Q7 and should be selected
explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

To better support different RAM timings (DDR3-1333 and DDR3-1866 are
assembly options for the RK3399-Q7), this refactors the DTS support
and renames the default DTS variant from rk3399-puma to
rk3399-puma-ddr1600:
- changes the rk3399-puma DTS into a board-specific DTSI by removing
  the inclusion of the DRAM timings
- adds a new rk3399-puma-ddr1600.dts, which includes the (new) common
  board DTSI and the DDR3-1600 timing DTSI
- wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

The Linux DTS for the RK3399-Q7 has moved with the times... resync
against it to ensure a consistent configuration.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This commit enables HDMI output in the DTS by adding the necessary
nodes to vopl/vopb and by adding the HDMI node.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The regs_otg field in uintptr_t of the platform data structure for
dwc2-otg has thus far been an unsigned int, but will eventually be
casted into a void*.

This raises the following error with GCC 6.3 and buildman:
  ../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe':
  ../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
    reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
          ^

This changes regs_otg to a uintptr_t to ensure that it is large enough
to hold any valid pointer (and fix the associated warning).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

With HDMI output for the RK3399 working, this update the RK3399-Q7
(Puma) defconfig for the new functionality:
1. enables PMIC command (to check if the HDMI voltages are correct)
      +CONFIG_CMD_PMIC=y
      +CONFIG_CMD_REGULATOR=y
2. enables video-output (via HDMI)
      +CONFIG_DM_VIDEO=y
      +CONFIG_DISPLAY=y
      +CONFIG_VIDEO_ROCKCHIP=y
      +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
3. turns on the 'dcache'-command (for a dcache flush) for our QA to
   fill the framebuffer using 'mw.l'
      +CONFIG_CMD_CACHE=y
4. turns on the 'bmp'-command
      +CONFIG_CMD_BMP=y
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NSimon Glass <sjg@chromium.org>

When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:

  drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
  drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
    rk_setreg(&priv->grf->soc_con6, 1 << 15);
    ^~~~~~~~~
  drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
    rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
    ^~~~~~~~~~~~

This change fixes this by including <asm/hardware.h> in rk_hdmi.c.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

The usb_gadget_handle_interrupts()-function is already implemented by
drivers/usb/gadget/dwc2_udc_otg.c, so we need to avoid defining it
in the evb-rk3328.c board-specific file.

This change fixes the following build error (from buildman):
  drivers/usb/gadget/built-in.o: In function `usb_gadget_handle_interrupts':
  build/../drivers/usb/gadget/dwc2_udc_otg.c:850: multiple definition of `usb_gadget_handle_interrupts'
  board/rockchip/evb_rk3328/built-in.o:build/../board/rockchip/evb_rk3328/evb-rk3328.c:37: first defined here
  make[1]: *** [u-boot] Error 1
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Add the compatible "rockchip,rk3328-xhci" in match table
for rk3328 to probe xhci controller. Use fixed regulator
to control the voltage of vbus and turn off vbus when
usb stop.
Signed-off-by: NMeng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add basic support for rv1108 evb, whith this patch we
can boot into u-boot console.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core
from Rockchip. It is designed for varies application scenario such
as car DVR, sports DV, secure camera and UAV camera.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add clock driver support for Rockchip rv1108 soc
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add pinctrl support for Rockchip rv1108 soc
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add support to mkimage for rv1108 soc, the max
spl code size for rv1108 is 6kb, and the spl
code should be packed by rksd, wether boot from
emmc or spi nor flash.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

For the RK3399-Q7 module, we use full OF_CONTROL (i.e. not
OF_PLATDATA) for SPL.  In this configuration, the rockchip_dw_mmc
driver retrieves one of its clocks via clk_get_by_name and fails if
this is not possible.  For this reason, we can not filter clock-names
from the device-tree nodes used for the configuration of the SPL
stage.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The RK3399-Q7 exposes I2C on its edge connector and uses it as one of
the interfaces towards the on-module STM32 (for the emulated RTC and
fan-controller).

Enable I2C and CMD_I2C support in the defconfig.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The RK3399-Q7 has a KSZ9031 GbE PHY. Enable support for it in defconfig.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

On the RK3399-Q7, we need PMIC support (for the RK808) to enable HDMI
output, as one of the required powerrails is not enabled on boot.
For this, we need to enable the RK808 driver.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 3
- With the recent upstream changes to the RK808 (PMIC) driver, the
  associated configuration options have been renamed to RK8XX.  Track
  this change in the RK3399-Q7 defconfig.
Reviewed-by: NSimon Glass <sjg@chromium.org>

defines the spl-payload to 256k (0x40000)
Signed-off-by: NKlaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up
to save power and needs to be woken up using GPIO4A3.

Note that this is not a negated reset-signal (due to a level shifter
being needed for this signal anyway), but a negated enable-signal:
to enable, we need to output LOW (i.e. 0)... so we mark this as an
ACTIVE_LOW signal.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>