Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it.
Also - add CONFIG_USB where necesarry - all boards use it,
but some are not defining it explicitly.

Affected boards:
colibri_t20, harmony, mcx, mt_ventoux, twister,
zynq_(picozed, zc702, zc706, zed, zybo)
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The following options can be now enabled via defconfig:
- CONFIG_USB_ULPI
- CONFIG_USB_ULPI_VIEWPORT
- CONFIG_USB_ULPI_VIEWPORT_OMAP
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NMarek Vasut <marex@denx.de>

Some host controllers need addidional initialization after ehci_reset()
In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET.
This patch adds similar option to ehci drivers using dm.
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Add support for gpio controllers on Qualcomm Snapdragon devices.
This devices are usually called Top Level Mode Multiplexing in
Qualcomm documentation.
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

This driver works in "new" Data Mover UART mode, so
will be compatible with modern Qualcomm chips only.
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.
Signed-off-by: NDan Murphy <dmurphy@ti.com>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Some EFI applications (grub2) expect that an allocation always returns
the highest available memory address for the given size.

Without this, we may run into situations where the initrd gets allocated
at a lower address than the kernel.

This patch fixes booting in such situations for me.
Signed-off-by: NAlexander Graf <agraf@suse.de>

This moves the sniper board from the lge to lg, in order to match the devicetree
vendor prefix already defined in the kernel.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

With the previous implementation, rebooting without registering a recognized
reboot mode would end up with U-Boot checking for a valid power-on reason, which
might result in the device turning off (e.g. with no USB cable attached and no
buttons pressed).

Since this approach is not viable (breaks reboot in most cases), the validity of
the reboot reason is checked (in turn, by checking that a warm reset happened,
as there is no magic) to detect a reboot and the 'o' char is recognized to
indicate that power-off is required. Still, that might be overridden by the
detection of usual power-on reasons, on purpose.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

With the previous implementation, rebooting without registering a recognized
reboot mode (despite registering the magic) would end up with U-Boot checking
for a valid power-on reason, which might result in the device turning off (e.g.
with no USB cable attached and no buttons pressed).

This was designed to catch reboots that are actually intended to be power-off,
something that old Android kernels do, instead of properly turning the device
off using the TWL4030.

However, since this approach is not viable (breaks reboot in most cases), the
validity of the reboot mode magic is checked to detect a reboot and the 'o' char
is recognized to indicate that power-off is required. Still, that might be
overridden by the detection of usual power-on reasons, on purpose.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

This adds some environment variables for sysboot and devicetree.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

Selecting CONFIG_OF_LIBFDT allows running recent mainline kernels.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

This makes the baudrate for the kernel command line explicit.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

This makes the baudrate for the kernel command line explicit.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

Make sure to call unmap_sysmem() for address allocated by map_sysmem()
before leaving the function; however this patch gives no impact on
the behavior because map_sysmem()/unmap_sysmem() does nothing except
on Sandbox.  Sandbox never runs this code because "booti" is a command
for booting ARM64 kernel image.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>

U-boot for general purpose KS2 devices is loaded to the beginning of the
internal memory (0x0c000000). Secure devices uses this memory and
CONFIG_SYS_TEXT_BASE has to be different for those devices.

This commit make this configurable at build time by giving
CONFIG_SYS_TEXT_BASE as a command line definition to make command.
Signed-off-by: NVitaly Andrianov <vitalya@ti.com>

The default board_init_f() implementation performs a call to
board_init_r() as the last step of the sequence. Fix the comment
for this function to reflect the actual execution flow.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>

Given that README.scrapyard shows scrapping of netta boards:

netta2           powerpc     mpc8xx         c51c1c9a    2014-07-07
netta            powerpc     mpc8xx         c51c1c9a    2014-07-07

delete netta example from POST tests.
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>

Add exclamation mark to the errmsg, when error and set_default_env.
Signed-off-by: NPeng Fan <van.freenix@gmail.com>
Cc: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Ravi Babu <ravibabu@ti.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

We only use 'ofs' in jffs2_sum_scan_sumnode when debugging as it's part
of a dbg_summary call.  Mark this as __maybe_unused.
Signed-off-by: NTom Rini <trini@konsulko.com>

We normally use __weak rather than calling it out directly as an alias.
Update this function to the normal method.
Signed-off-by: NTom Rini <trini@konsulko.com>

Since POST_ALWAYS is defined as:

#define POST_ALWAYS             (POST_NORMAL    | \
                                 POST_SLOWTEST  | \
                                 POST_MANUAL    | \
                                 POST_POWERON   )

there is no need to redundantly bitmask it with POST_MANUAL.
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>

POST support for sample lwmon board was removed in commit e5d30786.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>B

In case of #define DEBUG 1 (fordebugging SPL). A bug in
spl_nand_load_image() will be triggered, because it prints
using hw ecc regardless of soft ecc configurations and
initializations.
Signed-off-by: NAhmed Samir <engkhalil86@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with
the CPU complex swapped out for a quad-core ARMv8. This can operate in 32-
or 64-bit mode. 32-bit mode is the current default selected by the
VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of
U-Boot for the Raspberry Pi 3.

>From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a
change in usage of the SoC UARTs. On all previous Pis, the PL011 was the
only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a
UART to connect to the SoC. By default, the PL011 is used for this purpose
since it has larger FIFOs than the other "mini" UART. However, this can
be configured via the VideoCore firmware's config.txt file. This patch
hard-codes use of the mini UART in the RPi 3 port. If your system uses the
PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot
port instead. A future change might determine which UART to use at
run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed
together.

The mini UART has some limitations. One externally visible issue in the
BCM2837 integration is that the UART divides the SoC's "core clock" to
generate the baud rate. The core clock is typically variable, and under
control of the VideoCore firmware for thermal management reasons. If the
VC FW does modify the core clock rate, UART communication will be
corrupted since the baud rate will vary from the expected value. This was
not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To
work around this, the VideoCore firmware can be told not to modify the SoC
core clock. However, the only way this can happen and be thermally safe is
to limit the core clock to a low/minimum frequency. This leaves
performance on the table for use-cases that don't care about a UART
console. Consequently, use of the mini UART console must be explicitly
requested by entering the following line into config.txt:

    enable_uart=1

A recent version of the VC firmware is required to ensure that the mini
UART is fully and correctly initialized by the VC FW; at least
firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on
core clock See: https://github.com/raspberrypi/firmware/issues/572".
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

This adds an explanation of which Raspberry Pi models each target option
supports.
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

This allows U-Boot to known the name of the board.

The existing rpi_2_defconfig can operate correctly on the Raspberry Pi 3
in 32-bit mode /if/ you have configured the firmware to use the PL011 UART
as the console UART (the default is the mini UART). This requires two
things:
a) config.txt should contain dtoverlay=pi3-miniuart-bt
b) You should run the following to tell the VC FW to process DT when
booting, and copy u-boot.bin.img (rather than u-boot.bin) to the SD card
as the kernel image:

   path/to/kernel/scripts/mkknlimg --dtok u-boot.bin u-boot.bin.img

This works as of firmware.git commit 046effa13ebc "firmware: arm_loader:
emmc clock depends on core clock See:
https://github.com/raspberrypi/firmware/issues/572".
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

To simplify support for new SoCs, just use a constant filename
for the unknown case. In practice this case shouldn't be hit anyway, so
the filename isn't relevant, and certainly doesn't need to differentiate
between SoCs. If a user has an as-yet-unknown board, they can override
this value in the environment anyway.
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add some basic clarification that the dev.key file generated by OpenSSL
contains both the public and private key, and further highlight that
the certificate generated here contains the public key only.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>

Different sections in the document suggest flattened image tree blob
files have a file name extension of .itb. Fix the list of file extensions
to reflect that.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>

It is clearer to specify the full path to access the
doc/README.displaying-bmps file.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>

Add missing Privilege ID settings for KS2 SoCs.

Based on:
K2H/K: Table 6-7. Privilege ID Settings from SPRS866E (Nov 2013)
  http://www.ti.com/lit/ds/symlink/66ak2h14.pdf (page 99)
K2L: Table 7-7. Privilege ID Settings from SPRS930 (April 2015)
  http://www.ti.com/lit/ds/symlink/66ak2l06.pdf (page 71)
K2E: Table 7-7. Privilege ID Settings from SPRS865D (Mar 2015)
  http://www.ti.com/lit/ds/symlink/66ak2e05.pdf (page 75)
K2G: Table 3-16. PrivIDs from SPRUHY8 (Jan 2016)
  http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf (page 238)

Overall mapping:
-------+-----------+-----------+-----------+---------
PrivID | KS2H/K    | K2L       | K2E       | K2G
-------+-----------+-----------+-----------+---------
0      | C66x 0    | C66x 0    | C66x 0    | C66x 0
1      | C66x 1    | C66x 1    | Reserved  | ARM
2      | C66x 2    | C66x 2    | Reserved  | ICSS0
3      | C66x 3    | C66x 3    | Reserved  | ICSS1
4      | C66x 4    | Reserved  | Reserved  | NETCP
5      | C66x 5    | Reserved  | Reserved  | CPIE
6      | C66x 6    | Reserved  | Reserved  | USB
7      | C66x 7    | Reserved  | Reserved  | Reserved
8      | ARM       | ARM       | ARM       | MLB
9      | NetCP     | NetCP     | NetCP     | PMMC
10     | QM_PDSP   | QM_PDSP   | QM_PDSP   | DSS
11     | PCIe_0    | PCIe_0    | PCIe_0    | MMC
12     | DEBUG/DAP | DEBUG/DAP | DEBUG/DAP | DEBUG/DAP
13     | Reserved  | Reserved  | PCIe_1    | Reserved
14     | HyperLink | PCIe_1    | HyperLink | Reserved
15     | Reserved  | Reserved  | TSIP      | Reserved
-------+-----------+-----------+-----------+---------

NOTE: Few of these might have default configurations, however,
since most are software configurable, it is better to explicitly
configure the system to have a known default state.

Without programming these, we end up seeing lack of coherency on certain
peripherals resulting in inexplicable failures (such as USB peripheral's
DMA data not appearing on ARM etc and weird workarounds being done by
drivers including cache flushes which tend to have system wide
performance impact).

By marking these segments as shared, we also ensure SoC wide coherency
is enabled.
Reported-by: NBin Liu <b-liu@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

MSMC segment Privilege ID is not consistent accross the keystone2 SoCs.
As the first step to ensure complete SoC wide coherency setup, lets
refactor the macros to remove the #if-deffery around the code which
obfuscates which IDs are actually enabled for which SoC.

As a result of this change the PCIe configuration is moved after the
msmc configuration is complete, but that should ideally have no
functional impact.
Signed-off-by: NNishanth Menon <nm@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

smsc95xx_read_reg() should calculate sizeof(*data) not sizeof(data) since
data is a pointer, and the value pointed at is being transferred over USB,
not the value of the pointer. This fixes operation of the driver in 64-bit
builds, such as the Raspberry Pi 3.
Reported-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NMarek Vasut <marex@denx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Command parsing and processing code is not needed when the command line is
disabled. Remove this code in that case.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Some boards need to expose device specific variable through fastboot
(to adpat the flashing script depending on hardware revision for
example).

Provide a way to expose custom fastboot variables. Note that all
variables meant to be exposed through fastboot should be be prefixed
with 'fastboot.', the variable should not exceed 32 bytes (including
the prefix and the trailing '\0') and the variable content should
fit in the response buffer (60 bytes excluding the 'OKAY' prefix and
the trailing '\0').
Signed-off-by: NRob Herring <rob.herring@linaro.org>
[Boris Brezillon: add a commit message]
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NSteve Rae <srae@broadcom.com>

- Move most of the flags required into LLVM_RELFLAGS to test at build
  time instead of requiring them to be passed in.
- Update doc/README.clang to reflect this
- Switch to rpi_2 as the example as it's closer to working out of the
  box than rpi is.

Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: NTom Rini <trini@konsulko.com>