1. 14 8月, 2007 2 次提交
  2. 11 8月, 2007 1 次提交
    • S
      [ARM] TI DaVinci support, hopefully final · c74b2108
      Sergey Kubushyn 提交于
      Add support for the following DaVinci boards:
      - DV_EVM
      - SCHMOOGIE
      - SONATA
      
      Changes:
      
      - Split into separate board directories
      - Removed changes to MTD_DEBUG (or whatever it's called)
      - New CONFIG_CMD party line followed
      - Some cosmetic fixes, cleanup etc.
      - Patches against the latest U-Boot tree as of now.
      - Fixed CONFIG_CMD_NET in net files.
      - Fixed CONFIG_CMD_EEPROM for schmoogie.
      - Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
         DV_EVM. Can't check if it works on SONATA, don't have a board any more,
         but it at least compiles.
      
      Here is an excerpt from session log on SCHMOOGIE...
      
      U-Boot 1.2.0-g6c33c785-dirty (Aug  7 2007 - 13:07:17)
      
      DRAM:  128 MB
      NAND:  128 MiB
      In:    serial
      Out:   serial
      Err:   serial
      ARM Clock : 297MHz
      DDR Clock : 162MHz
      ETH PHY   : DP83848 @ 0x01
      U-Boot > iprobe
      Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
      U-Boot > ping 192.168.253.10
      host 192.168.253.10 is alive
      U-Boot >
      Signed-off-by: NSergey Kubushyn <ksi@koi8.net>
      Acked-by: NDirk Behme <dirk.behme@gmail.com>
      Acked-by: NZach Sadecki <Zach.Sadecki@ripcode.com>
      Acked-by: NStefan Roese <sr@denx.de>
      c74b2108
  3. 27 7月, 2007 1 次提交
  4. 13 7月, 2007 1 次提交
  5. 12 7月, 2007 1 次提交
  6. 11 7月, 2007 1 次提交
  7. 10 7月, 2007 2 次提交
  8. 04 7月, 2007 1 次提交
  9. 23 6月, 2007 1 次提交
    • H
      [PCS440EP] upgrade the PCS440EP board: · 566a494f
      Heiko Schocher 提交于
                      - Show on the Status LEDs, some States of the board.
                      - Get the MAC addresses from the EEProm
                      - use PREBOOT
                      - use the CF on the board.
                      - check the U-Boot image in the Flash with a SHA1
                        checksum.
                      - use dynamic TLB entries generation for the SDRAM
      Signed-off-by: NHeiko Schocher <hs@denx.de>
      566a494f
  10. 17 5月, 2007 1 次提交
  11. 14 4月, 2007 1 次提交
  12. 05 4月, 2007 1 次提交
  13. 08 3月, 2007 1 次提交
  14. 29 11月, 2006 1 次提交
  15. 04 11月, 2006 1 次提交
  16. 02 11月, 2006 1 次提交
    • R
      Tundra tsi108 on chip Ethernet controller support. · d1927cee
      roy zang 提交于
      The following is a brief description of the Ethernet controller:
      The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
      Gigabit Ethernet ports,E0 and E1.  It uses a single Management interface
      to manage the two physical connection devices (PHYs).  Each Ethernet port
      has its own statistics monitor that tracks and reports key interface
      statistics.  Each port supports a 256-entry hash table for address
      filtering.  In addition, each port is bridged to the Switch Fabric
      through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
      
      Each Ethernet port also has a pair of internal Ethernet DMA channels to
      support the transmit and receive data flows.  The Ethernet DMA channels
      use descriptors set up in memory, the memory map of the device, and
      access via the Switch Fabric.  The Ethernet Controller?s DMA arbiter
      handles arbitration for the Switch Fabric.  The Controller also
      has a register businterface for register accesses and status monitor
      control.
      
      The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
      modes.  The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
      The GMII and TBI modes are used to connect with Gigabit PMDs.  Internal
      data flows to and from the Ethernet Controller through the Switch Fabric.
      
      Each Ethernet port uses its transmit and receive DMA channels to manage
      data flows through buffer descriptors that are predefined by the
      system (the descriptors can exist anywhere in the system memory map).
      These descriptors are data structures that point to buffers filled
      with data ready to transmit over Ethernet, or they point to empty
      buffers ready to receive data from Ethernet.
      Signed-off-by: NAlexandre Bounine <alexandreb@tundra.com>
      Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
      d1927cee
  17. 12 10月, 2006 1 次提交
  18. 09 10月, 2006 2 次提交
  19. 02 9月, 2006 1 次提交
    • M
      Add support for a saving build objects in a separate directory. · f9328639
      Marian Balakowicz 提交于
      Modifications are based on the linux kernel approach and
      support two use cases:
      
        1) Add O= to the make command line
        'make O=/tmp/build all'
      
        2) Set environement variable BUILD_DIR to point to the desired location
        'export BUILD_DIR=/tmp/build'
        'make'
      
      The second approach can also be used with a MAKEALL script
      'export BUILD_DIR=/tmp/build'
      './MAKEALL'
      
      Command line 'O=' setting overrides BUILD_DIR environent variable.
      
      When none of the above methods is used the local build is performed and
      the object files are placed in the source directory.
      f9328639
  20. 15 8月, 2006 1 次提交
  21. 30 5月, 2006 1 次提交
    • W
      * Update Intel IXP4xx support · ba94a1bb
      Wolfgang Denk 提交于
      - Add IXP4xx NPE ethernet MAC support
      - Add support for Intel IXDPG425 board
      - Add support for Prodrive PDNB3 board
      - Add IRQ support
      Patch by Stefan Roese, 23 May 2006
      
      [This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
       sufferes from licensing issues. Blame Intel.]
      ba94a1bb
  22. 27 4月, 2006 1 次提交
  23. 01 4月, 2006 1 次提交
  24. 13 3月, 2006 1 次提交
  25. 12 3月, 2006 1 次提交
  26. 01 12月, 2005 1 次提交
  27. 30 11月, 2005 1 次提交
    • S
      Add support for TQM8541/8555 boards, TQM85xx support reworked: · d96f41e0
      Stefan Roese 提交于
      - Support for TQM8541/8555 boards added.
      - Complete rework of TQM8540/8560 support.
      - Common TQM85xx code now supports all current TQM85xx platforms
        (TQM8540/8541/8555/8560).
      - DDR SDRAM size detection added.
      - CAS latency default values can be overwritten by setting "serial#"
        to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
        If problems are detected with this non default CAS latency,
        the defualt values will be used instead.
      - FLASH size detection added.
      - Moved FCC ethernet driver initialization behind TSEC driver init
        -> TSEC is first device.
      
      Patch by Stefan Roese, 30 Nov 2005
      d96f41e0
  28. 11 11月, 2005 1 次提交
  29. 29 10月, 2005 1 次提交
  30. 13 10月, 2005 1 次提交
  31. 12 10月, 2005 1 次提交
  32. 09 10月, 2005 1 次提交
  33. 25 9月, 2005 3 次提交
  34. 03 9月, 2005 1 次提交
  35. 31 8月, 2005 1 次提交