- 11 6月, 2019 16 次提交
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由 Sjoerd Simons 提交于
All i.mx6 boards seems to have moved to DM_USB, however gadget support for mx6 is still pre-DM as CI_UDC isn't converted yet. To make this work the usb otg controller used for gadgets needs to be usb number 0. Add an alias for this directly in the main u-boot mx6qdl dtsi so it doesn't need to be done for each board separately. This fixes regressions wrt. usb gadget functionality in several boards that have gadget functions enabled in their config, but no usb0 alias in their device-tree. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
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由 Marek Vasut 提交于
Enable DM block and DM MMC support on iMX6SX VINING|2000 . Convert board code to match the DM support. This disables USB mass storage support due to missing DM USB, however that will be re-enabled in subsequent patch. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
Import iMX6SX VINING|2000 device tree from Linux 5.1.1 b724e9356404 . Enable DT control in full U-Boot . Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Parthiban Nallathambi 提交于
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: NParthiban Nallathambi <parthitce@gmail.com>
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由 Marcel Ziswiler 提交于
This commit adds initial support for the Toradex Apalis iMX8QM 4GB WB IT V1.0B module. Unlike the V1.0A early access samples exclusively booting from SD card, they are now strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports either booting from the on-module eMMC or may be used for recovery purpose using the universal update utility (uuu) aka mfgtools 3.0. Functionality wise the following is known to be working: - eMMC, 8-bit and 4-bit MMC/SD card slots - Gigabit Ethernet - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QM as of yet. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NMax Krummenacher <max.krummenacher@toradex.com>
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由 Marcel Ziswiler 提交于
Add support for i2c0, i2c1, i2c2, i2c3 and i2c4. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NMax Krummenacher <max.krummenacher@toradex.com>
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由 Marcel Ziswiler 提交于
Add support for lpuart1, lpuart2, lpuart3 and lpuart4. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NMax Krummenacher <max.krummenacher@toradex.com>
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由 Marek Vasut 提交于
Enable DM block, DM MMC and DM SATA support on iMX6Q Novena convert board code to match the DM support. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org>
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由 Marek Vasut 提交于
Import iMX6Q Novena device tree from Linux 5.1-rc7 37624b58542f . Enable DT control in full U-Boot . Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org>
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由 Marek Vasut 提交于
The SPI nCS signal is active low, make it so. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
Import DHCOM iMX6 PDK2 device tree from Linux 5.1.1 b724e9356404 . Enable DT control in full U-Boot . Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Marcel Ziswiler 提交于
This fixes an issue with USB host mode. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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由 Igor Opaniuk 提交于
Migrate USB to Driver Model (CONFIG_DM_USB=y). Acked-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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由 Marcel Ziswiler 提交于
Add device tree to Makefile to avoid newly introduced error: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument make[1]: *** [dts/Makefile:28: arch/arm/dts/imx6-apalis.dtb] Error 1 make: *** [Makefile:1009: dts/dt.dtb] Error 2 Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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由 Parthiban Nallathambi 提交于
u-boot,dm-spl property is specific to U-Boot, so created one for i.MX6ULL platforms. Signed-off-by: NParthiban Nallathambi <parthitce@gmail.com>
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由 Marcel Ziswiler 提交于
This commit adds initial support for the Toradex Colibri iMX8QXP 2GB WB IT V1.0B module. Unlike the V1.0A early access samples exclusively booting from SD card, they are now strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports either booting from the on-module eMMC or may be used for recovery purpose using the universal update utility (uuu) aka mfgtools 3.0. Functionality wise the following is known to be working: - eMMC and MMC/SD card - Ethernet - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QXP as of yet. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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- 06 6月, 2019 3 次提交
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由 Thierry Reding 提交于
Add an "ethernet" alias that points to the default network interface, which is the built-in EQoS on Jetson TX2. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Thierry Reding 提交于
Recent versions of DTC have checks for PCI host bridge device tree nodes that are named something other than "pci" or "pcie". Fix all occurrences of such nodes for Tegra boards to avoid potential warnings from DTC. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Adam Ford 提交于
Resync imx6q-logicpd with Kernel 5.1.5 Signed-off-by: NAdam Ford <aford173@gmail.com>
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- 05 6月, 2019 1 次提交
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由 Igor Opaniuk 提交于
Extend lcdif DT node with proper display-timings for mxsfb driver. Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com>
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- 04 6月, 2019 1 次提交
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由 Dennis Gilmore 提交于
This allows SPL to load the main U-Boot image from MMC once DM_MMC is enabled. Signed-off-by: NDennis Gilmore <dennis@ausil.us> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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- 31 5月, 2019 2 次提交
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由 Neil Armstrong 提交于
The following DT nodes in the process on review for Linux 5.3, until Linux 5.3 is tagged, add the missing DT nodes in u-boot specific DTSI files that will be dropped when the v5.3-rc1 DT is synced again. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
Sync from Linux commit a188339ca5a3 ("Linux 5.2-rc1") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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- 30 5月, 2019 3 次提交
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由 Jagan Teki 提交于
Add initial support for Rock PI 4 board. Specification - Rockchip RK3399 - LPDDR4 - eMMC - SD card slot - RTL8211E 1Gbps - HDMI In/Out, DP, MIPI DSI/CSI - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-rock-pi-4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: add ROCK Pi 4 DTS support" (sha1: 1b5715c602fda7b812af0e190eddcce2812e5417) Signed-off-by: NAkash Gajjar <akash@openedev.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: NAkash Gajjar <akash@openedev.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Add initial support for Nanopi NEO4 board. Specification - Rockchip RK3399 - 1GB DDR3-1866 - SD card slot - eMMC Socket - RTL8211E 1Gbps - AP6212 WiFI/BT - HDMI In/Out, DP, MIPI CSI - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 5V/3A Commit details of rk3399-nanopi-neo4.dts sync from Linux: "arm64: dts: rockchip: Add Nanopi NEO4 initial support" (sha1: 092470b537f19788d957aed12d835a179b606014) Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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- 24 5月, 2019 1 次提交
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由 Tien Fong Chee 提交于
Finding bitstream from cff-file is no longer valid after bitstream is built into FIT image and loaded by generic firmware loader. Remove cff-file as this is legacy implementation from A10 downstream. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>
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- 23 5月, 2019 2 次提交
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由 Patrick Delaunay 提交于
Update DDR configuration with the latest update: - PUBL_regs: DXnGCR[0]= according to ddr_width to disable Byte lane 2/3 in 16bit - fix LPDDR2/3 timing_calc to step RL/WL in relaxed timings mode - remove LPDDR3 RL3 (optional) support vs MR0[7] because MR0[7] can't be read instead always apply worse RL/WL for LPDDR3 when freq < 166MHz) - change MR3 to 48ohm drive for LPDDR2/3 - change default ZPROG[7:4] = 0x1 for LPDDR2/3 , '0' is not allowed even when ODT not used - use DQSTRN for LPDDR2/3 (it was not set in PIR) - LPDDR3: set dqsge/dwsgx gate extension to 2,2 like LPDDR2 -DDRCTRL.dfitmg0: + for LPDDR3 tphy_wrlat = WL (as LPDDR2) + improvement for relaxed mode vs RL/Wl at corner case. For example @533MHz RL/WL (relaxed) = 9/5 for LPDDR2/3 and correction to MR2 accordingly - DDR_PCFGQOS1_1: port1 timeout relaxed from 0x00 to 0x40, for LTDC. - DDR_PCFGWQOS0_0: change vpr level from 11 to 12 in order to include the CPU on the variable priority queue. - DDR_SCHED: fix to consider 13 levels (13 levels - 1 = 0xC) Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Patrick Delaunay 提交于
Allow fractional support in DDR tools. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
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- 22 5月, 2019 6 次提交
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由 Qiang Zhao 提交于
Signed-off-by: NZhao Qiang <qiang.zhao@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Peng Ma 提交于
Move the ecc addr from driver to dts. Signed-off-by: NPeng Ma <peng.ma@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
LS1028AQDS Development System is a high-performance computing, evaluation, and development platform that supports LS1028A QorIQ Architecture processor. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang yuantian <andy.tang@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation platform that supports the LS1028A family SoCs. This patch add basic support of the platform. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
Ls1028a SoC is based on Layerscape Chassis Generation 3.2 architecture with features: 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers, 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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- 20 5月, 2019 3 次提交
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由 Peng Fan 提交于
Meet the following boot hang. " U-Boot SPL 2019.04-00661-gdc80a012e4 (Apr 25 2019 - 10:31:57 +0800) Trying to boot from MMC1 U-Boot 2019.04-00661-gdc80a012e4 (Apr 25 2019 - 10:31:57 +0800) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C)Reset cause: POR Model: Freescale i.MX6 Quad SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB Video device 'ipu@2400000' cannot allocate frame buffer memory -ensure the device is set up before relocation Error binding driver 'ipuv3_video': -28 Video device 'ipu@2800000' cannot allocate frame buffer memory -ensure the device is set up before relocation Error binding driver 'ipuv3_video': -28 Some drivers failed to bind Error binding driver 'generic_simple_bus': -28 Some drivers failed to bind initcall sequence 4ffe4500 failed at call 1780dfb7 (err=-28) " 1. fdtdec_get_alias_seq will use "video" as base, however in alias node, we use ipux, so add new alias for U-Boot dts. 2. DM_VIDEO is enabled, however reserve_video is called before relocation, so to make DM_VIDEO work before relocation, need to set SYS_MALLOC_F_LEN 3. defconfig is updated with savedefconfig Note: I do not have a video panel to test, but with this patch, U-Boot boots up again, below log. " U-Boot SPL 2019.04-00662-g0b62453bff (Apr 25 2019 - 10:36:31 +0800) Trying to boot from MMC1 U-Boot 2019.04-00662-g0b62453bff (Apr 25 2019 - 10:36:31 +0800) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Model: Freescale i.MX6 Quad SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 3 Loading Environment from MMC... *** Warning - bad CRC, using default environment PCI: pcie phy link never came up In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 " Signed-off-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Steffen Dirkwinkel 提交于
The ipu node in imx53 is needed for DM_VIDEO. We also need to set u-boot,dm-pre-reloc to initialize before relocation. Signed-off-by: NSteffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
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由 Stefan Roese 提交于
Without this U-Boot specific property, booting on Armada XP theadorable fails in SPL. All nodes in the "internal-regs" (simple-bus) DT node are not scanned, so the UART node is missing (and others). I'm not adding this property in an *u-boot.dtsi file, since there is none matching the generic rules for all files including this dtsi file. So to not miss any of the boards using this dtsi file, I'm adding it to this file directly, which makes the Linux merge a less easy unforunately. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: NChris Packham <judge.packham@gmail.com>
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- 19 5月, 2019 2 次提交
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由 Philippe Reynes 提交于
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Philippe Reynes 提交于
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NStefan Roese <sr@denx.de>
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