- 27 3月, 2008 39 次提交
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由 Pieter Voorthuijsen 提交于
Signed-off-by: NPieter Voorthuijsen <pv@prodrive.nl>
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由 Stefan Roese 提交于
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of ram and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed the now "corrected" memory size and won't touch it either. This should work for arch/ppc and arch/powerpc. Only Linux board ports in arch/powerpc with bootwrapper support, which recalculate the memory size from the SDRAM controller setup, will have to get fixed in Linux additionally. This patch enables this config option on some PPC440EPx boards as a workaround for the CHIP 11 errata. Here the description from the AMCC documentation: CHIP_11: End of memory range area restricted access. Category: 3 Overview: The 440EPx DDR controller does not acknowledge any transaction which is determined to be crossing over the end-of-memory-range boundary, even if the starting address is within valid memory space. Any such transaction from any PLB4 master will result in a PLB time-out on PLB4 bus. Impact: In case of such misaligned bursts, PLB4 masters will not retrieve any data at all, just the available data up to the end of memory, especially the 440 CPU. For example, if a CPU instruction required an operand located in memory within the last 7 words of memory, the DCU master would burst read 8 words to update the data cache and cross over the end-of-memory-range boundary. Such a DCU read would not be answered by the DDR controller, resulting in a PLB4 time-out and ultimately in a Machine Check interrupt. The data would be inaccessible to the CPU. Workaround: Forbid any application to access the last 256 bytes of DDR memory. For example, make your operating system believe that the last 256 bytes of DDR memory are absent. AMCC has a patch that does this, available for Linux. This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards: lwmon5, korat, sequoia The other remaining 440EPx board were intentionally not included since it is not clear to me, if they use the end of ram for some other purpose. This is unclear, since these boards have CONFIG_PRAM defined and even comments like this: PMC440.h: /* esd expects pram at end of physical memory. * So no logbuffer at the moment. */ It is strongly recommended to not use the last 256 bytes on those boards too. Patches from the board maintainers are welcome. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
The routine ft_board_setup() configures the EBC NOR mappings for the Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from 0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS problem, we need to pass the corrected address here too. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch adds support for the AMCC Glacier 460GT eval board. The main difference to the Canyonlands board are listed here: - 4 ethernet ports instead of 2 - no SATA port - no USB port Currently EMAC2+3 are not working. This will be fixed in a later release. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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由 Anatolij Gustschin 提交于
Currently U-Boot building in some external directory doesn't work. This patch tries to fix the problem. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Anatolij Gustschin 提交于
Fix typo in README Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Anatolij Gustschin 提交于
This patch fixes compilation error cmd_usb.c: In function 'do_usb': cmd_usb.c:552: error: void value not ignored as it ought to be Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Timur Tabi 提交于
Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying the I2C bus speed. Current 8[356]xx boards define the CFG_I2C_SPEED macro, but fsl_i2c.c ignores it and uses conservative value when programming the I2C bus speed. Signed-off-by: NTimur Tabi <timur@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Dave Liu 提交于
Add the Freescale on-chip SATA controller driver to u-boot, The SATA controller is used on the 837x and 8315 targets, The driver can be used to load kernel, fs and dtb. The features list: - 1.5/3 Gbps link speed - LBA48, LBA28 support - DMA and FPDMA support - Two ports support Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
add simple libata support in u-boot Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
original ata_piix driver is using IDE framework, not real SATA framework. For now, the ata_piix driver is only used by x86 sc520_cdp board. This patch makes the ata_piix driver use the new SATA framework, so - remove the duplicated command stuff - remove the CONFIG_CMD_IDE define in the sc520_cdp.h - add the CONFIG_CMD_SATA define to sc520_cdp.h Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
- add the SATA framework - add the SATA command line Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
move the sata.h from include/ to drivers/block/ata_piix.h Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
move the cmd_sata.c from common/ to drivers/ata_piix.c, the cmd_sata.c have some part of ata_piix controller drivers. consolidate the driver to have better framework. Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Markus Klotzbuecher 提交于
f6b44e0e that will cause usb_stor_info to only print only information on one storage device, but not for multiple. Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Anatolij Gustschin 提交于
This patch fixes compilation error cmd_usb.c: In function 'do_usb': cmd_usb.c:552: error: void value not ignored as it ought to be Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Kumar Gala 提交于
Provide a board_lmb_reserve helper function to ensure we reserve the page of memory we are using for the boot page translation code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jon Loeliger 提交于
Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 Kumar Gala 提交于
ft_fixup_cpu() got duplicated in some merge snafu. Remove the duplicate. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 James Yang 提交于
Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NJon Loeliger <jdl@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 James Yang 提交于
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were called. However, get_sys_info() recalculates extraneous information when called each time. Have get_ddr_freq() and get_bus_freq() return memoized values from global_data instead. Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 James Yang 提交于
Show the DDR memory data rate in addition to the memory clock frequency. For DDR/DDR2 memories the memory data rate is 2x the memory clock. Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 James Yang 提交于
Speed up get_tbclk() by referencing pre-computed bus clock frequency value from global data instead of sys_info_t. Fix rounding of result to nearest; previously it was rounding upwards. Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Andy Fleming 提交于
FSL has taken to using SVR[16:23] as an SOC sub-version field. This is used to distinguish certain variants within an SOC family. To account for this, we add the SVR_SOC_VER() macro, and update the SVR_* constants to reflect the larger value. We also add SVR numbers for all of the current variants. Finally, to make things neater, rather than use an enormous switch statement to print out the CPU type, we create and array of SVR/name pairs (using a macro), and print out the CPU name that matches the SVR SOC version. Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Andy Fleming 提交于
Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Kumar Gala 提交于
Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Kumar Gala 提交于
Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 26 3月, 2008 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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