- 10 3月, 2015 8 次提交
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由 Hans de Goede 提交于
The Orange Pi Mini is an A20 based development board featuring 1G RAM, HDMI, 1Gbit ethernet, USB wifi, SATA, 2 sdcard slots (use the top one for booting), 2 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Orange Pi is an A20 based development board featuring 1G RAM, HDMI & VGA, 1Gbit ethernet, USB wifi, SATA, 4 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V. Also see: http://www.orangepi.org/Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND, sdio wifi, 1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen and a ton of IO connectors. Note there seem to be multiple sdcard slots on the board (4 in total), but other then mmc0 none of these are hooked up by default, there is a ton of dip-switches which likely allow hooking some of these up, but the documentation of the board only describes the use of a fraction of them, so for now we only support mmc0. Also see: http://www.merrii.com/en/pla_d.asp?id=163Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Jens Lucius 提交于
The Forfun Q88DB is an A13 tablet in the common Q8 format. Features are 512MB RAM, 4GB NAND, 7" Display, RTL8188 Wifi, 2 cameras. For more details see: http://linux-sunxi.org/Forfun_Q88DBSigned-off-by: NJens Lucius <info@jenslucius.com> Acked-by: NIan Campbell <ijc@hellion.org.uk> Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
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由 Marcus Cooper 提交于
The Mele I7 is a Allwinner based Android TV box. It features a A31 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, SPDIF, IrDA, 3 USB A, 1 USB micro OTG and Wireless LAN. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Marcus Cooper 提交于
The MK808C is a Allwinner based Android TV dongle. It features a A20 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out, 1 USB A, 1 USB mini OTG, Bluetooth and Wireless LAN. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Gábor Nyers 提交于
The Jesurun Q5 has a black plastic casing with the approximate dimensions of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can be extended up to 32GB with a MicroSD card. The external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to power) and an programmable green led. On the board there is also an unpopulated IR receiver and the UART. The devices is equipped with an AXP209 PMU. For more details see: http://linux-sunxi.org/Jesurun_Q5Signed-off-by: NGábor Nyers <gnyers@opensuse.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Adam Sampson 提交于
The tpr3 (timing skew) parameter is used in all supported versions of the sunxi DRAM controller, but it was only enabled for sun4i in 47e3501a. Signed-off-by: NAdam Sampson <ats@offog.org> Acked-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 09 3月, 2015 14 次提交
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Added support to disable the start of application by using a environment variable autostart Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Linus Walleij 提交于
While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jan Kiszka 提交于
This fixes a regression of e310b93e, affecting Ethernet on the Jetson TK1, e.g. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
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由 Tom Rini 提交于
The way the PSCI DT update happens currently means we pull in <asm/armv7.h> everywhere, including on ARMv8 and that in turn brings in <asm/io.h> for some non-PSCI related things that header needs to deal with. To fix this, we rework the hook slightly. A good portion of arch/arm/cpu/armv7/virt-dt.c is common looking and I hope that when PSCI is needed on ARMv8 we can re-use this by and large. So rename the current hook to psci_update_dt(), move the prototype to <asm/psci.h> and add an #ifdef that will make re-use later easier. Reported-by: NYork Sun <yorksun@freescale.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: York Sun <yorksun@freescale.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: NTom Rini <trini@konsulko.com> Acked-by: NYork Sun <yorksun@freescale.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Warren <twarren.nvidia@gmail.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Rini <trini@konsulko.com>
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由 Przemyslaw Marczak 提交于
The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Odroid XU3 by disabling the memset at malloc init. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Odroid X2/U3 by disabling the memset at malloc init. This was tested on Odroid X2. A quick test with checking gpio pin state using the oscilloscope. Boot time from start to bootcmd (change gpio state by memory write command): - ~228ms - before this change (arch memset enabled for .bss clear) - ~100ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
Reduce the boot time of Trats2 by disabling the memset at malloc init. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~464ms - before this change (arch memset enabled for .bss clear) - ~341ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
This commit introduces new config: CONFIG_SYS_MALLOC_CLEAR_ON_INIT. This config is an expert option and is enabled by default. The all amount of memory reserved for the malloc, is by default set to zero in mem_malloc_init(). When the malloc reserved memory exceeds few MiB, then the boot process can slow down. So disabling this config, is an expert option to reduce the boot time, and can be disabled by Kconfig. Note: After disable this option, only calloc() will return the pointer to the zeroed memory area. Previously, without this option, the memory pointed to untouched malloc memory region, was filled with zeros. So it means, that code with malloc() calls should be reexamined. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Przemyslaw Marczak 提交于
For writing files, DFU implementation requires the file buffer with the len at least of file size. For big files it requires the same big buffer. Previously the file buffer was allocated as a static variable, so it was a part of U-Boot .bss section. For 32MiB len of buffer we have 32MiB of additional space, required for this section. The .bss needs to be cleared after the relocation. This introduces an additional boot delay at every start, but usually the dfu feature is not required at the standard boot, so the buffer should be allocated only if required. This patch removes the static allocation of this buffer, and alloc it with memalign after first call of function: - dfu_fill_entity_mmc() and the buffer is freed on dfu_free_entity() call. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~888ms - before this change (arch memset enabled for .bss clear) - ~464ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> Cc: Marek Vasut <marek.vasut@gmail.com>
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由 Przemyslaw Marczak 提交于
For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY, will highly increase the memset/memcpy performance. This is able thanks to the ARM multiple register instructions. Unfortunatelly the relocation is done without the cache enabled, so it takes some time, but zeroing the BSS memory takes much more longer, especially for the configs with big static buffers. A quick test confirms, that the boot time improvement after using the arch memcpy for relocation has no significant meaning. The same test confirms that enable the memset for zeroing BSS, reduces the boot time. So this patch enables the arch memset for zeroing the BSS after the relocation process. For ARM boards, this can be enabled in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1384ms - before this change - ~888ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com>
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由 Przemyslaw Marczak 提交于
This commit enables the following configs: - CONFIG_USE_ARCH_MEMCPY - CONFIG_USE_ARCH_MEMSET This increases the performance of memcpy/memset and also reduces the boot time. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1527ms - before this change (arch memset enabled for .bss clear) - ~1384ms - after this change Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
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- 08 3月, 2015 1 次提交
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- 06 3月, 2015 17 次提交
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由 Masahiro Yamada 提交于
All the DM-related configuration options are described in Kconfig helps. They should not be duplicated in README. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This strdup() is missing a check. Add it. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Masahiro Yamada 提交于
Since commit e02ee254 (kconfig: switch to single .config configuration), the ".*.cmd" files are not correctly created for SPL/TPL. The U-Boot extension code in fixdep, which was introduced to support the multiple .config, must be removed. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Alexey Brodkin 提交于
With limit of 16 symbols very simple device names derived drom device tree description could not be displayed correctly. For example "serial0@0xc0fc1000" will be truncated to sensless "serial0@0xc0fc10" - note dropped tariling zeros. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Fabio Estevam 提交于
Currently the usage text for the 'ums' command looks like this: Usage: ums ums <USB_controller> [<devtype>] <devnum> e.g. ums 0 mmc 0 ,so remove the extra 'ums' in the text. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br> Acked-by: NMarek Vasut <marex@denx.de>
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由 Alexey Brodkin 提交于
In case of global data structure defined as "register volatile" compiler throws an warning about incorrect type used: --->8--- common/board_f.c: In function "board_init_f_r": common/board_f.c:1073:2: warning: passing argument 1 of "&board_init_r +(sizetype)gd->reloc_off" discards "volatile" qualifier from pointer target type [enabled by default] (board_init_r + gd->reloc_off)(gd, gd->relocaddr); ^ common/board_f.c:1073:2: note: expected "struct gd_t *" but argument is of type "volatile struct gd_t *" --->8--- An obvious fix is manual casting to "gd_t *". Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Alexey Brodkin 提交于
lib/asm-offsets - make GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP available for all architectures GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP are generic members of global data structure so why don't we allow architectures other than ARM to use it. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Heiko Schocher 提交于
running "spl export ..." more than once fails with: Trying to execute a command out of order Trying to execute a command out of order Trying to execute a command out of order Trying to execute a command out of order Trying to execute a command out of order Trying to execute a command out of order ERROR prep subcommand failed! Subcommand failed reason is commmit: 35fc84fa: Refactor the bootm command to reduce code duplication It used "state != BOOTM_STATE_START" but state is a bitfield, so check if the bit BOOTM_STATE_START is not set. With this fix, "spl export ..." can called more than once ... Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Linus Walleij 提交于
This enables the vexpress64 to detect its NOR flash so that we can load kernel etc from it. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Chen Gang 提交于
For some assemblers, they use another character as newline in a macro (e.g. arc uses '`'), so for generic assembly code, need use ASM_NL (a macro) instead of ';' for it. Basically this is the same patch as applied to Linux kernel - http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/include/linux/linkage.h?id=9df62f054406992ce41ec4558fca6a0fa56fffeb but modified a bit to fit in U-Boot. Signed-off-by: NChen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com>
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由 Ash Charles 提交于
The 'nandecc sw' command selects a software-based error correction algorithm. By default, this is OMAP_ECC_HAM1_CODE_SW but some platforms use OMAP_ECC_BCH8_CODE_HW_DETECTION_SW as their software-based correction algorithm. Allow a user to be specific e.g. # nandecc sw <hamming|bch8> where 'hamming' is still the default. Note: we don't just use CONFIG_NAND_OMAP_ECCSCHEME as it might be set to a hardware-based ECC scheme---a little strange when the user has requested 'sw' ECC. Signed-off-by: NAsh Charles <ashcharles@gmail.com>
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由 Michal Sojka 提交于
Commit fb384c47 introduced the use of WAIT0 pin for determining whether the NAND is ready or not. This only works if all NAND chips are connected to WAIT0. If some chips are connected to the other available pin WAIT1, nand_wait() does not really wait and prints a WARN_ON message. This patch allows the board to provide configuration of which chip is connected to which WAITx signal. For example, one can define in include/configs/foo.h: #define CONFIG_NAND_OMAP_GPMC_WSCFG 0,0,1,1 This would mean that chips using to CS0 and 1 are connected to WAIT0 and chips with CS2 and 3 are connected to WAIT1. Signed-off-by: NMichal Sojka <sojka@merica.cz> Acked-by: NStefan Roese <sr@denx.de> Tested-by: NMichal Vokáč <michal.vokac@comap.cz> Cc: Tom Rini <trini@ti.com>
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