- 18 5月, 2018 21 次提交
-
-
由 Ley Foon Tan 提交于
Add Clock Manager driver support for Stratix SoC Signed-off-by: NChin Liang See <chin.liang.see@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
-
由 Ley Foon Tan 提交于
Add the base address for watchdog and firewall. Signed-off-by: NChin Liang See <chin.liang.see@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
-
由 Ben Kalo 提交于
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers Access Control register offset is 0x50. Signed-off-by: NBen Kalo <ben.h.kalo@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
-
由 Tien Fong Chee 提交于
SoC FPGA info is required in both SPL and U-Boot. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>
-
由 Tien Fong Chee 提交于
Clock frequency info is required in U-Boot because info would be erased when transition from SPL to U-Boot. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>
-
由 Tien Fong Chee 提交于
Enable memory allocation in SPL for preparation to enable FAT in SPL. Memory allocation is needed by FAT to work properly. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: NDinh Nguyen <dinguyen@kernel.org>
-
由 Tien Fong Chee 提交于
This patch enables DDR Kconfig support for Arria 10. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: NDinh Nguyen <dinguyen@kernel.org>
-
由 Tien Fong Chee 提交于
Add DDR driver support for Arria 10. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>
-
由 Tien Fong Chee 提交于
Add function for both multiple DRAM bank and single DRAM bank size initialization. This common functionality could be used by every single SOCFPGA board. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com> Tested-by: NLey Foon Tan <ley.foon.tan@intel.com>
-
由 Tien Fong Chee 提交于
Current sdram driver is only applied to gen5 device, hence it is better to rename sdram driver to more specific name which is related to gen5 device. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>
-
由 Marek Vasut 提交于
The EMAC reset and PHY mode configuration was never working on the Arria10 SoC, fix this. This patch pulls out the common code into misc.c and passes the SoC-specific function call in as a function pointer. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest Quartus to get the new set of clock bindings in. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit ef8216d28a5920022cddcb694d2d75bd1f0035ca Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
Sort the Makefile entries, no functional change. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
The A10 clock manager parsed DT bindings generated by Quartus the bsp-editor to configure the A10 clocks. Sadly, those DT bindings changed at some point. The clock manager patch used the old ones, this patch replaces the bindings parser with one for the new set. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
Pull the serial port configuration from DT and use DM serial instead of having the serial configuration in two places, DT and board config. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
Shuffle the default Kconfig entries around so it is not such a mess. No functional change. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
This was never used, is not used anywhere and is just in the way by adding annoying ifdeffery. Get rid of it. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
The global data are in the .data section, so there's no point in reserving any space for it above stack. Put stack at the end of SRAM. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
由 Marek Vasut 提交于
The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
-
-
- 17 5月, 2018 13 次提交
-
-
由 Chris Packham 提交于
When Kconfig support was added for MVGBE it included automatically selected PHYLIB support. But MVGBE does not need PHYLIB it will build fine without it. Commit ed52ea50 ("net: add Kconfig for MVGBE") should have been a no-op in terms of build size but because of the selecting PHYLIB the openrd configs increased in size. Remove the automatic selection of PHYLIB, boards that need it will have already enabled it in their config header file. Fixes: commit ed52ea50 ("net: add Kconfig for MVGBE") Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable device tree control in u-boot. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL. Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Chris Packham 提交于
These files are taken verbatim from the Linux kernel 4.17 Signed-off-by: NChris Packham <judge.packham@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de>
-
-
- 16 5月, 2018 6 次提交
-
-
由 Chris Packham 提交于
This was unintentionally disabled when moving MVGBE to Kconfig. Fixes: commit ed52ea50 ("net: add Kconfig for MVGBE") Signed-off-by: NChris Packham <judge.packham@gmail.com>
-
由 Kever Yang 提交于
Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk which add by mmc_bind(), these device do not have/need set pinctrl state. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
-
由 Lothar Waßmann 提交于
When the U-Boot base directory happens to have the same name as the branch that buildman is directed to use via the '-b' option and no output directory is specified with '-o', buildman happily starts removing the whole U-Boot sources eventually only stopped with the error message: OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg Add a check to avoid this and also deal with the case where '-o' points to the source directory, or any subdirectory of it. Finally, tidy up the confusing logic for removing the old tree when using -b. This is only done when building a branch. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NSimon Glass <sjg@chromium.org> Tested-by: NLothar Waßmann <LW@KARO-electronics.de>
-
由 Bryan O'Donoghue 提交于
Compiling the f_mass_storage driver for an x86 target results in a compilation error as set_bit and clear_bit are provided by bitops.h To address that situation we discussed on the list moving to genetic_set_bit() instead. Doing a quick grep for similar situations in drivers/usb shows that the composite device is using __set_bit(). This patch switches over to generic_set_bit to maintain consistency between the two gadget drivers. Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de>
-
由 Bryan O'Donoghue 提交于
Compiling the f_mass_storage driver for an x86 target results in a compilation error as set_bit and clear_bit are provided by bitops.h Looking at the provenance of the current u-boot code and the git change history in the kernel, it looks like we have a local copy of set_bit and clear_bit as a hold-over from porting the Linux driver into u-boot. These days __set_bit and __clear_bit are optionally provided by an arch and can be used as inputs to generic_bit_set and generic_bit_clear. This patch switches over to generic_set_bit and generic_clear_bit to accommodate. Tested on i.MX WaRP7 and Intel Edison Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de>
-
由 Bryan O'Donoghue 提交于
nds2 bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in nds32 bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
-