- 12 12月, 2013 3 次提交
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由 Claudiu Manoil 提交于
Add the __iomem address space marker for the tsec pointers to struct tsec_mii_mng memory mapped register regions. This solves the sparse warnings for mixig normal pointers with __iomem pointers for tsec. p1_p2_rdb_pc.c:373:24: warning: incorrect type in assignment (different address spaces) p1_p2_rdb_pc.c:373:24: expected struct tsec_mii_mng [noderef] <asn:2>*regs p1_p2_rdb_pc.c:373:24: got struct tsec_mii_mng *<noident> Use TSEC_GET_MDIO_REGS_BASE() for the remaining mdio 'regs' initializations to remove the __iomem warnings and for consistency. Signed-off-by: NClaudiu Manoil <claudiu.manoil@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com>
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由 Shengzhou Liu 提交于
As mEMAC1 and mEMAC2 are dual-role MACs, which are used as 1G or 10G MAC. So we update dynamically 'cell-index' to '2' and '3' for 10GEC3 and 10GEC4. Also change 'fsl,fman-port-1g-rx' to 'fsl,fman-port-10g-rx', ditto for Tx. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com>
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由 Shaohui Xie 提交于
A new valid setting case added for fman1, it uses platform frequency. Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com>
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- 11 12月, 2013 2 次提交
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git://git.denx.de/u-boot-arm由 Tom Rini 提交于
Conflicts: board/samsung/trats2/trats2.c include/configs/exynos5250-dt.h Signed-off-by: NTom Rini <trini@ti.com>
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由 Albert ARIBAUD 提交于
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
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- 10 12月, 2013 11 次提交
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由 Ian Campbell 提交于
Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Cc: albert.u.boot@aribaud.net
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由 Soren Brinkmann 提交于
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Mike Frysinger 提交于
We want to test SPI flash code in the sandbox, so enable the new drivers and the 'sf test' command. This command is used to validate the sandbox SPI / SPI flash implementation, so enable it. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Mike Frysinger 提交于
This adds a SPI flash driver which simulates SPI flash clients. Currently supports the bare min that U-Boot requires: you can probe, read, erase, and write. Should be easy to extend to make it behave more exactly like a real SPI flash, but this is good enough to merge now. sjg@chromium.org added a README and tidied up code a little. Added a required map_sysmem() for sandbox. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Mike Frysinger 提交于
This adds a SPI framework for people to hook up simulated SPI clients. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This was obtained from Linux 3.12 commit 5e01dc7b26. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This allows us to put the SPI flash chip inside the SPI interface node, with U-Boot finding the correct bus and chip select automatically. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The new name is longer but more clearly related to sandbox. This is in a separate patch within the same series since some comments on the SPI series rely on it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHung-ying Tyan <tyanh@chromium.org>
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- 09 12月, 2013 7 次提交
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由 Mateusz Kulikowski 提交于
Add support for USB-A9263 board manufactured by Calao Systems (http://www.calao-systems.com/). Code is based on old U-Boot sources (2010.09) released by Calao. Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Heiko Schocher 提交于
enable support for the siemens AT91SAM9G20 based board corvus. Signed-off-by: NBoris Schmidt <boris.schmidt@siemens.com> Reviewed-by: NHeiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Heiko Schocher 提交于
enable support for the siemens AT91SAM9G20 based boards taurus and axm. Signed-off-by: NRoger Meier <r.meier@siemens.com> Reviewed-by: NHeiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Andreas Bießmann 提交于
In order to get the very same value for legacy pin definitions and new gpio definitions set the legacy PIN_BASE to 0. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Andreas Bießmann 提交于
This patch define new names for GPIO pins on at91 devices. Follow up patches will convert the whole infrastructure to use these new definitions. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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- 08 12月, 2013 4 次提交
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由 Kuo-Jung Su 提交于
Faraday FTSDC021 is a controller which is compliant with SDHCI v3.0, SDIO v2.0 and MMC v4.3. However this driver is only verified with SD memory cards. Signed-off-by: NKuo-Jung Su <dantesu@faraday-tech.com> Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com> CC: Andy Fleming <afleming@gmail.com>
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由 Priyanka Jain 提交于
Existing eSDHC SPL framework assumes booting from sd-image with boot_format header which contains final u-boot Image offset and size. No such header is present in case of corenet devices like T1040 as corenet deivces use PBI-RCW based intialization. So, for corenet deives, SPL bootloader use values provided at compilation time. These values can be defined in board specific config file. Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>
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由 Alexey Brodkin 提交于
If platform provides "host->fifoth_val" it will be used for initialization of DWMCI_FIFOTH register. Otherwise default value will be used. This implementation allows: * escape unclear and recursive calculations that are currently in use * use whatever custom value for DWMCI_FIFOTH initialization if any particular SoC requires it Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>
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由 Jaehoon Chung 提交于
dw-mmc.c is the general driver file. So, remove the exynos specific code at dw-mmc.c. Instead, exynos specific cod can be move into exynos-dw_mmc.c. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NAlexey Brodkin <abrodkin@synopsys.com> Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com> Acked-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 07 12月, 2013 2 次提交
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由 Albert ARIBAUD 提交于
Current LDS files /DISCARD/ a lot of sections when linking ELF files, causing diagnostic tools such as readelf or objdump to produce partial output. Keep all section at link stage, filter only at objcopy time so that .bin remains minimal. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
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由 Masahiro Yamada 提交于
The lower 5 bit of MVBAR is UNK/SBZP. So, Monitor Vector Base Address must be 32-byte aligned. On the other hand, the secure monitor handler does not need 32-byte alignment. This commit moves ".algin 5" directive to the correct place. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andre Przywara <andre.przywara@linaro.org> Acked-by: NAndre Przywara <andre.przywara@linaro.org>
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- 06 12月, 2013 11 次提交
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由 Albert ARIBAUD 提交于
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由 Albert ARIBAUD 提交于
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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由 Roger Quadros 提交于
Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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由 Roger Quadros 提交于
Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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由 Roger Quadros 提交于
In commit bb1f327d we removed the UHH reset to fix NFS root (over usb ethernet) problems with Beagleboard (3530 ES1.0). However, this seems to cause USB detection problems for Pandaboard, about (3/8). On further investigation, it seems that doing the UHH reset is not the cause of the original Beagleboard problem, but in the way the reset was done. This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based on the UHH_REVISION register. This should fix the Beagleboard NFS problem as well as the Pandaboard USB detection problem. Reported-by: NTomi Valkeinen <tomi.valkeinen@ti.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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由 Michael Trimarchi 提交于
This patch change the per_clocks_enable() function used in OMAP3 code to enable peripherals clocks. Only required clock should be activated. So if the board use the uart(x) as a console we need to activate it. The Board's config should include define to enable every subsystem that the board use. For a complete list of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER should be checked. Right now the bootloader can enable and disable clocks for: uart(x) using CONFIG_SYS_NS16550 gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 } i2c bus using CONFIG_DRIVER_OMAP34XX_I2C. Not required gptimer(x) and mcbsp(x) for booting are disabled by default and are not supported by any define. Their activation need to included in the per_clocks_enable if the peripheral is included. Not booting board should enable the peripheral clock connected to their driver Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Minkyu Kang 提交于
arndale board is booted from mmc Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Inderpal Singh <inderpal.singh@linaro.org>
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由 Minkyu Kang 提交于
This patch fix following errors and warnings spl_boot.c: In function 'exynos_spi_copy': spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function) spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function) spl_boot.c: In function 'copy_uboot_to_ram': spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable] spl_boot.c: At top level: spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function] Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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由 Albert ARIBAUD 提交于
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