According to SoC document, revision info is separated to integer part and
fracton part.
So I separete rmobile_get_cpu_rev() to rmobile_get_cpu_rev_integer() and
rmobile_get_cpu_rev_fraction().
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly.
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Renesas SH73A0 is CPU with Cortex-A9.
This supports the basic register definition and GPIO.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

ARMv7 has global timer. This provides the register definition of this timer.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided.  Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
Acked-by: NStefano Babic <sbabic@denx.de>

setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
Acked-by: NStefano Babic <sbabic@denx.de>

The patch adds basic support for the Freescale's i.MX35
(arm1136 based) processor.

The patch adds also a prototype for the initialization
of the FEC(ethernet controller) to netdev.h to avoid
warnings.
Signed-off-by: NStefano Babic <sbabic@denx.de>

Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.
Signed-off-by: NJason Liu <r64343@freescale.com>

The OMAP3 cpu directory contains a syslib file with some utilities
that can be shared by all targets using arm cortexa8 processors,
not only OMAP.
Signed-off-by: NStefano Babic <sbabic@denx.de>

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
  The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: NStefano Babic <sbabic@denx.de>

Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.

l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>

  - add support for microblaze processors
  - add support for AtmarkTechno "suzaku" board