Signed-off-by: NStephan Linz <linz@li-pro.net>

The interrupt acknowledge action have to run after the
registered interrupt handler. So we have a chance to
bear out the corresponding interrupt request in the
corresponding controller hardware.

With this reordering, we optain a proper interrupt
handling for level triggered interrupt sources -- for
example the new axi_timer v1.02.a introduced in ISE 13.2.
Signed-off-by: NStephan Linz <linz@li-pro.net>
Acked-by: NMichal Simek <monstr@monstr.eu>

after commit "common: add possibility for readline_into_buffer
timeout" (sha1:9c348311) was applied. The Microblaze generic build
fails with error below:

common/libcommon.o: In function `cread_line':
/devel/u-boot/common/main.c:717: undefined reference to `get_ticks'
/devel/u-boot/common/main.c:717: undefined reference to `get_tbclk'
/devel/u-boot/common/main.c:720: undefined reference to `get_ticks'
Signed-off-by: NStephan Linz <linz@li-pro.net>
Acked-by: NMichal Simek <monstr@monstr.eu>

* 'master' of git://git.denx.de/u-boot-mmc:
  mmc: make mmc_send_status() more reliable
  mmc: fix card busy polling
  Tegra: mmc: Fixed handling of interrupts in timeouts.
  omap_hsmmc: Wait for CMDI to be clear

* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/8xxx:Add MPH controller support in USB device-tree fixup
  powerpc/8xxx: Cleanup USB device-tree fixup

* 'trini@ti.com' of git://git.denx.de/u-boot-staging:
  usb_ether: fix typo
  cmd_eeprom: typo
  doc: complete, typos

* 'master' of git://git.denx.de/u-boot-x86:
  x86: Convert board_init_f_r to a processing loop
  x86: Split init functions out of board.c
  x86: Move relocation code out of board.c
  x86: Move setup_pcat_compatibility() out of board.c
  x86: Move do_go_exec() out of board.c
  CHECKPATCH: arch/x86/lib/*
  x86: Tweak IDT and GDT for alignment and readability
  x86: Allow cache before copy to RAM
  x86: Create weak init_cache() and default enable_caches() functions
  x86: Set GD_FLG_RELOC after entering in-RAM copy of U-Boot
  x86: Use fs for global data
  x86: Rework relocation calculations
  x86: Simplify Flash-to-RAM code execution transition
  x86: Rework Global Descriptor Table loading
  x86: Remove GDR related magic numbers
  x86: Speed up copy-to-RAM and clear BSS operations
  x86: Import glibc memcpy implementation

Align the card status polling with the Linux kernel and retry the
command at least five times. Also some cards apparently mishandle the
status bits, so make sure to check the card state too.
Signed-off-by: NJan Kloetzke <jan.kloetzke@dspg.com>
Cc: Andy Fleming <afleming@gmail.com>

A MMC/SD card may always go into the programming state (and hence be
busy) after a block write. Therefore always check the card state, even
after single block writes. On the other hand there is no need to check
the card status after a read.

Also make sure that errors during busy polling are propagated upwards.
Signed-off-by: NJan Kloetzke <jan.kloetzke@dspg.com>
Cc: Andy Fleming <afleming@gmail.com>

We are seeing occasional timeouts in the Tegra mmc code when
we are reading from external MMC cards. These don't seem to be
detrimental if they are handled properly.  This CL properly
clears the "normal interrupt status register" (norintsts) in
error conditions.  If we don't do this, when we come back into
mmc_send_cmd() the register will still contain status from the
last transaction.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case.  This makes the code check
for both bits being clear and makes the error print more clear as
to what happened.  DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.

Fix originally spotted by Peter Bigot.
Tested-by: NPeter A. Bigot <bigotp@acm.org>
Tested-by: NRobert Nelson <robertcnelson@gmail.com>
Signed-off-by: NTom Rini <trini@ti.com>
Tested-by: NAndreas Müller <schnitzeltony@googlemail.com>

Add support for fixing usb mode and phy type for
MPH(Multi Port Host) USB controllers in device-tree nodes.
Required for socs like P3060, P5020, etc having MPH USB controller
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>

Some code cleanup done for USB device-tree fixup:
	- handling error value returned from fdt_fixup_usb_mode_phy_type()
	- using ARRAY_SIZE macro
	- using snprintf instead of sprintf
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>

Signed-off-by: NPeter Meerwald <p.meerwald@bct-electronic.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NPeter Meerwald <p.meerwald@bct-electronic.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>

mention repeatable to README.commands and fix some typos
Signed-off-by: NPeter Meerwald <p.meerwald@bct-electronic.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Tested-by: NMarek Vasut <marek.vasut@gmail.com>

* 'sf' of git://git.denx.de/u-boot-blackfin:
  README: Add description of SPI Flash (SF) command configuration
  sf command: allow default bus and chip selects
  sf: eeprom_m95xxx: set a sane default timeout
  sf: eeprom_m95xxx: fix up style

* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: pata_bfin: fix printf warning
  Blackfin: bfin_nand: mark local func static
  linkage.h: move from blackfin to common includes
  Blackfin: br4: new board port
  Blackfin: add in/out le32 variants
  post: add blackfin to the post_time_ms list
  Blackfin: bf537-stamp: drop board reset workaround
  Blackfin: pr1: new board port

Acked-by: NJason Liu <jason.hui@linaro.org>
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This patch allows a board configuration file to provide default bus
and chip-selects for SPI flash so that first argument to the 'sf' command
is optional.

On boards that use the mxc_spi driver and a GPIO for chip select, this allows
a much simpler command line:
	U-Boot> sf probe
instead of
	U-Boot> sf probe 0x5300
Tested-by: NJason Liu <jason.hui@linaro.org>
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Every board currently defines this to the same value, so just default
to that to avoid having to make everyone do the same thing.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

pata_bfin.c: In function 'bfin_ata_identify':
pata_bfin.c:887:2: warning: format '%x' expects type 'unsigned int',
	but argument 2 has type 'lbaint_t'
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This devready func is only used in this driver, so mark it static.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

1. Add linkage.h support from blackfin to common include,
   which is a reduced version from Linux.
2. Add architecture part support of linkage.h into blackfin
3. Fix include path of in blackfin related to linkage.h
   due to header file movement.
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This adds support for the BR4 Appliance.  It is a quad channel ISDN BRI
board based on Blackfin BF537 CPU.
Signed-off-by: NDimitar Penev <dpn@switchfin.org>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

These are rarely used, but the post code does currently, so add small
redirect hacks for that.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The bf537-stamp shouldn't need this SPI flash workaround.  It was added
by accident a long time ago through a convoluted series of steps which
originated from a customer board (not the bf537-stamp).  So drop it to
keep people from incorrectly adding it to their own boards.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This add support for the PR1 Appliance - Asterisk based ISDN PRI PBX.
This board is Blackfin BF537 based.  The schematics are not fully opened.
Signed-off-by: NDimitar Penev <dpn@switchfin.org>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This patch adds support for the Calimain board from
OMICRON electronics GmbH. The board features a Texas Instruments AM1808
SoC, 128 MB DDR2 memory, and 64 MB NOR flash memory connected to CS2 and
CS3.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>

This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.

Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: NSughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: NChristian Riesch <christian.riesch@omicron.at>

Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Tested-by: NHeiko Schocher <hs@denx.de>

The V bit of the c1 register of CP15 should not be cleared on DA850
SoCs since they have no valid memory at 0x00000000. This patch
introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
that allows setting the correct value for the V bit.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Reported-by: NSughosh Ganu <urwithsughosh@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Heiko Schocher <hs@denx.de>

The current implementation invalidates the data cache before turning it
off and causes problems on the hawkboard. See the discussion in
http://lists.denx.de/pipermail/u-boot/2012-January/115212.html

According to the ARM926EJ-S Technical Reference Manual, the cache should
be flushed instead.

Also fix the comments to match code.
Signed-off-by: NSughosh Ganu <urwithsughosh@gmail.com>

Rebased and corrected commit message.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Tested-by: NHeiko Schocher <hs@denx.de>

This patch reverts commit ca4b5580
"arm, arm926ejs: always do cpu critical inits" since it impacts all
arm926ejs based configurations and caused problems, e.g., with
the hawkboard.

Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines
from the board configurations that need low level initialization.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: NHeiko Schocher <hs@denx.de>
Tested-by: NHeiko Schocher <hs@denx.de>

The low level initialization code in
arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for
DM644X SoCs only. This patch makes the lowlevel_init function in this
file a dummy function for SoCs other than DM644X.
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Cc: Sergey Kubushyn <ksi@koi8.net>
Acked-by: NHeiko Schocher <hs@denx.de>
Tested-by: NHeiko Schocher <hs@denx.de>

ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c".  To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: NPeter Barada <peter.barada@logicpd.com>

The initial checkin dropped pinmux setup for GPMC pins A6-A10, D0-D7 and
NCS1/2 necessary to access LAN92xx on Logic OMAP35x/DM37x modules.
Signed-off-by: NPeter Barada <peter.barada@logicpd.com>

We do not have thermal management or Smartreflex
enabled at U-Boot level. So, it's better to stick
to OPP100 for MPU instead of the OPP Turbo that is
used now. Adjust the VDD_MPU accordingly.
Tested-by: NSebastien Jan <s-jan@ti.com>
Signed-off-by: NAneesh V <aneesh@ti.com>