- 24 11月, 2016 3 次提交
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由 York Sun 提交于
Use CONFIG_TARGET_MPC8548CDS instead. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
While we move some config macros to Kconfig, kconfig header is needed to avoid compiling error if not already included. Signed-off-by: NYork Sun <york.sun@nxp.com>
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- 19 11月, 2016 2 次提交
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由 Semen Protsenko 提交于
This option isn't used for anything, so get rid of it. Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org>
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由 Semen Protsenko 提交于
Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org> [trini: Fix sniper and kc1 migration] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 18 11月, 2016 2 次提交
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git://github.com/agraf/u-boot由 Tom Rini 提交于
Patch queue for efi - 2016-11-17 Highlights this time around: - x86 efi_loader support - hello world efi test case - network device name is now representative - terminal output reports modes correctly - fix psci reset for ls1043/ls1046 - fix efi_add_runtime_mmio definition for x86 - efi_loader support for ls2080
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- 17 11月, 2016 8 次提交
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由 Alexander Graf 提交于
Most new systems in U-Boot these days make use of the generic "distro" framework which allows a user to have U-Boot scan for a bootable OS on all available media types. This patch extends the LS2080ARDB board to use that framework if the hard coded NOR flash location does not contain a bootable image. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
When implementing efi loader support, we can expose runtime services for payloads. One such service is CPU reset. This patch implements RTS CPU reset support for layerscape systems. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alexander Graf 提交于
The efi loader code has its own memory map, so it needs to be aware where the spin tables are located, to ensure that no code writes into those regions. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's rather claim it's a reserved region in the EFI memory map Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alexander Graf 提交于
On ls2080 we have a separate network fabric component which we need to shut down before we enter Linux (or any other OS). Along with that also comes configuration of the fabric using a description file. Today we always stop and configure the fabric in the boot script and (again) exit it on device tree generation. This works ok for the normal booti case, but with bootefi the payload we're running may still want to access the network. So let's add a new fsl_mc command that defers configuration and stopping the hardware to when we actually exit U-Boot, so that we can still use the fabric from an EFI payload. For existing boot scripts, nothing should change with this patch. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NYork Sun <york.sun@nxp.com> [agraf: Fix x86 build]
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由 Alexander Graf 提交于
The efi_add_runtime_mmio prototype for disabled CONFIG_EFI_LOADER was different from the enabled one. Sync them. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement for reset. Don't enable generic PSCI reset code on them. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
Some boards decided not to run ATF or other secure firmware in EL3, so they instead run U-Boot there. The uEFI spec doesn't know what EL3 is though - it only knows about EL2 and EL1. So if we see that we're running in EL3, let's get into EL2 to make payloads happy. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 16 11月, 2016 4 次提交
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由 Maxime Ripard 提交于
The SinA33 comes with an optional 7" display. Enable it in the configuration. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com>
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由 Maxime Ripard 提交于
The SinA33 has an 4GB Toshiba eMMC connected to the MMC2 controller. Enable it. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com>
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由 Maxime Ripard 提交于
The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com>
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由 Maxime Ripard 提交于
Some eMMC will fail at the first switch, but would succeed in a subsequent one. Make sure we try several times to cover those cases. The number of retries (and the behaviour) is currently what is being used in Linux. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 15 11月, 2016 21 次提交
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由 Bharat Kumar Gogada 提交于
Adding prefetchable memory space to pcie device tree node. Shifting configuration space to 64-bit address space. Removing pcie device tree node from amba as it requires size-cells=<2> in order to access 64-bit address space. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Kedareswara rao Appana 提交于
Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure. xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2 This patch fixes this issue. Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Kedareswara rao Appana 提交于
LPDDMA default allows only secured access. inorder to enable these dma channels, one should ensure that it allows non secure access. This patch updates the same. Reported-by: NSai Pavan Boddu <saipava@xilinx.com> Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Use 64bit size cell for main amba bus instead of 32bit because PCIe node requires it Change 64bit sizes also for all others IPs. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Naga Sureshkumar Relli 提交于
This patch adds ocm controller node in zynqmp.dtsi. needed for OCM edac support. Signed-off-by: NNaga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Anurag Kumar Vulisha 提交于
This patch adds the ZynqMP GT core device-tree properties for zynqmp.dtsi file. Signed-off-by: NAnurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: NHyun Kwon <hyunk@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
This reverts commit bd750e7a Implemented the new workaround for auto tuning based on zynqmp compatible string, so removed the 'broken-tuning' property. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Sai Krishna Potthuri 提交于
This patch changes the compatible string for sdhci node, adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node. Signed-off-by: NSai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add SMMU description for all tested IPs. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Nava kishore Manne 提交于
Add support for zynqmp fpga manager. Signed-off-by: NNava kishore Manne <navam@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Naga Sureshkumar Relli 提交于
This patch adds edac node for arm cortexa53 to report errors on L1 and L2 caches. Signed-off-by: NNaga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
This reverts commit 786db82b. Since we are using serdes driver , no need of mapping serdes register space into DP driver. Signed-off-by: NAnurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: NHyun Kwon <hyunk@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Hyun Kwon 提交于
Each plane can be associated with multiple DMA channels. So add index for each DMA channel. Signed-off-by: NHyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Keep dtsi in sync with mainline kernel. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Remove unused xlnx,id property because it is not the part of DT binding. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Bharat Kumar Gogada 提交于
Updating required device tree changes as per mainlined driver from 4.6 kernel. Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Filip Drazic 提交于
Previously, it was assumed that there is a 1:1 mapping between PM ID defined in the platform firmware and a PM domain. However, there can be a situation where multiple PM IDs belong to a single PM domain (e.g. PM IDs for GPU and two pixel processors correspond to a single PM domain). This patch adds support for assigning more than one PM ID to a single PM domain. Updated documentation accordingly. Assigned pixel processors PM IDs to GPU PM domain. Signed-off-by: NFilip Drazic <filip.drazic@aggios.com> Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Filip Drazic 提交于
Signed-off-by: NFilip Drazic <filip.drazic@aggios.com> Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Filip Drazic 提交于
Signed-off-by: NFilip Drazic <filip.drazic@aggios.com> Acked-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Filip Drazic 提交于
DDR power states are handled by the PM firmware, so this domain is redundant. Also, since there is no device using this PM domain, it will be powered off during boot, which is wrong. Signed-off-by: NFilip Drazic <filip.drazic@aggios.com> Acked-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
i2c device is just level shifter. Remove reference from dts. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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