- 17 10月, 2014 1 次提交
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由 Ruchika Gupta 提交于
Hardware accelerated support for SHA-1 and SHA-256 has been added. Hash command enabled along with hardware accelerated support for SHA-1 and SHA-256 for platforms which have CAAM block. Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 26 9月, 2014 1 次提交
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由 York Sun 提交于
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: NYork Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
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- 09 9月, 2014 1 次提交
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由 Wang Huan 提交于
LS102xA is an ARMv7 implementation. This patch is to add basic support for LS1021AQDS board. One DDR controller DUART1 is used as the console For the detail board information, please refer to README. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NJason Jin <jason.jin@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
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