This adds the basic register access operations and child regulator
binding (if a regulator driver exists).

Robert Beckett: simplify accesses by using bottom bit of address as
offset overflow. This avoids the need to track which page we are on.
Add an option CONFIG_SPL_DM_PMIC_DA9063.
Signed-off-by: NMartin Fuzzey <martin.fuzzey@flowbird.group>
Signed-off-by: NRobert Beckett <bob.beckett@collabora.com>

The 3-bit "command", or register, is encoded within the device address.
Configure the device accordingly, and pass command in DM I2C read/write
calls correctly.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NRobert Beckett <bob.beckett@collabora.com>

If we didn't unbind the sata from block device, the same devices would
be added after sata remove,
This patch is to resolve this issue as below:

=> sata info
SATA#0:
	(3.0 Gbps)
SATA#1:
	(3.0 Gbps)
Device 0: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005PY30
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
Device 1: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005VX30
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
=> sata stop
=> sata info
SATA#0:
	(3.0 Gbps)
SATA#1:
	(3.0 Gbps)
Device 0: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005PY300
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
Device 1: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005VX300
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
Device 2: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005PY300
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
Device 3: Model: INTEL SSDSA2BW300G3D Firm: 4PC10362 Ser#: BTPR247005VX300
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 286168.1 MB = 279.4 GB (586072368 x 512)
Signed-off-by: NPeng Ma <peng.ma@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This shrinks the image size: all -3840.0 text -3840.0
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Acked-by: NSoeren Moch <smoch@web.de>

This can be used for device tree size reduction similar as
CONFIG_OF_SPL_REMOVE_PROPS option. Some boards must pass the
built-in DTB unchanged to the kernel, thus we may not cut it
down unconditionally. Therefore enable the property removal
list option only if CONFIG_OF_DTB_PROPS_REMOVE is selected.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

- Various clock fixes and enhancements

Since frac_pll_init() is only used in this file, change it to 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:662:5: warning: no previous
prototype for ‘frac_pll_init’ [-Wmissing-prototypes]
Signed-off-by: NPedro Jardim <jardim.c.pedro@gmail.com>

Function sscg_pll_init() is not used anywhere, so it can simply be deleted.
This was found because of the following sparse
warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:702:5: warning: no previous prototype for ‘sscg_pll_init’ [-Wmissing-prototypes]
 int sscg_pll_init(u32 pll)
     ^~~~~~~~~~~~~
Signed-off-by: NPedro Jardim <jardim.c.pedro@gmail.com>

Since do_imx8m_showclocks() is only used inside this file, make it 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:836:5: warning: no previous prototype
 for ‘do_imx8m_showclocks’ [-Wmissing-prototypes]
 int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
     ^~~~~~~~~~~~~~~~~~~
Signed-off-by: NPedro Jardim <jardim.c.pedro@gmail.com>

Function init_usb_clk() is not used anywhere, so it can simply be deleted.
This was detected by the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:377:6: warning: no previous prototype
 for ‘init_usb_clk’ [-Wmissing-prototypes]
 void init_usb_clk(void)
      ^~~~~~~~~~~~
Signed-off-by: NPedro Jardim <jardim.c.pedro@gmail.com>

Guard 'parent_rate==0' to prevent 'divide by zero' issue in
clk_pplv3_av_set_rate(). If it is 0, let's return with -EINVAL.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Guard 'mfd==0' to prevent 'divide by zero' issue in
clk_pplv3_av_get_rate(). If it is 0, let's return with EIO since mfd
should never be 0 at all.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Guard 'parent_rate==0' to prevent 'divide by zero' issue in
clk_pplv3_sys_get_rate(). If it is 0, let's return with -EINVAL.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

m68k needs block cache list initialized after relocation.
Other architectures must not be involved.

Fixing regression related to:

commit 1526bcce
	("common: add blkcache init")
Signed-off-by: NAngelo Durgehello <angelo.dureghello@timesys.com>

This function parameter usage of load_addr was incorrectly caught in
the clarifying renames of commit bb872dd9, which results in boot
failures on Marvell A38x.
Signed-off-by: NJoel Johnson <mrjoel@lixil.net>
Patch-to: Simon Glass <sjg@chromium.org>

- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)

Orange Pi Win has gigabit ethernet port, but default U-Boot
configuration for that board enabled ethernet driver but
didn't enable realtek phy.

Fix that.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>

Since commit 067e0b96 ("sunxi: Allow booting from 128KB SD/eMMC offset")
we support having the SPL loaded from either the traditional 8KB SD
card/eMMC offset, or from the alternative location at 128KB. However the
sector to find the U-Boot image was still hard-coded at compile time,
and had to be adjusted for one of the two choices.

Since we can actually override the function to return the sector offset,
we can just check the boot source byte there to select the proper offset
based on from where the SPL was loaded.

This allows the very same binary image to be loaded from either 128KB or
8KB, with the U-Boot proper image always being located just behind the SPL.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NJagan Teki <jagan@amarulasolutions.com>

The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into
a certain location in SRAM, so the SPL can easily determine where to
load U-Boot proper from.
Factor out reading this value, as it will come in handy again shortly.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NJagan Teki <jagan@amarulasolutions.com>

dev_read_addr_ptr returns NULL on error, not FDT_ADDR_T_NONE.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

This header was missing a couple of include dependencies when included on its
own.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

clk_get_by_name() requires clk_get_by_id() that is not available if
CONFIG_OF_PLATDATA is defined, so move clk_get_by_name() into #else
condition of #if CONFIG_IS_ENABLED(OF_PLATDATA).
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

It will ease debug when uclass_get_device_by_name failed with
more error info printed out.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

mtk_clk_find_parent_rate is calling clk_get_rate to know the rate
of a parent clock. clk_get_rate returns a ulong, while
mtk_clk_find_parent_rate returns an int. This implicit cast creates
an issue for clock rates big enough to need the full 32 bits to
store its data. When that happen the clk rate will become incorrect
because of the implicit cast between ulong -> int -> ulong.

This commit change the return type of mtk_clk_find_parent_rate to
ulong.
Signed-off-by: NFabien Parent <fparent@baylibre.com>

Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a,
ls1088a platforms:
- lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes

- Enable fastboot on some MediaTek platforms
- DMA enchancements
- Assorted bugfixes

This patch adds a prototype for the weak function
board_mtdparts_default().

It solves one warning when compiling with W=1 on stm32mp1 board:

board/st/stm32mp1/stm32mp1.c:
     warning: no previous prototype for 'board_mtdparts_default'
              [-Wmissing-prototypes]
     void board_mtdparts_default(const char **mtdids,
                                 const char **mtdparts)
          ^~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

The blkcache_read() routine returns 1 (true) to indicate that a block was
found in the cache and returned, or 0 if not.
Signed-off-by: NEric Nelson <eric@nelint.com>

There is a typo in meerkat96 MAINTAINERS email address.  Fix it.
Reported-by: NCarl Gelfand <carl@novtech.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

genboardscfg.py requires python 3.x since commit 3bc14098
("genboardscfg.py: Convert to Python 3").

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted to the relocated struct list_head address,
so the first iteration over the block_cache list hangs.

This patch initializes the block_cache list after relocation.
Signed-off-by: NAngelo Durgehello <angelo.dureghello@timesys.com>
Reviewed-by: NEric Nelson <eric@nelint.com>

Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
While at that fix dma_unmap_single() call to match new prototype
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate  operations, so that drivers need not implement
them locally.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NRick Chen <rick@andestech.com>

This patch includes the following:
1. Add fastboot command to erase the whole EMMC_USER
2. Add fastboot command to flash image at EMMC_BOOT1
3. Add fastboot command to erase the whole EMMC_BOOT1
4. Enale CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT for mt8518
Signed-off-by: Nmingming lee <mingming.lee@mediatek.com>

Enable EFI module.
Enable fastboot.
Signed-off-by: Nmingming lee <mingming.lee@mediatek.com>

Enable board_late_init and usb gadget for mt8518
Signed-off-by: Nmingming lee <mingming.lee@mediatek.com>

set common fastboot variables for mt8518
Signed-off-by: Nmingming lee <mingming.lee@mediatek.com>

Add board_late_init function to init usb gadget driver for mt8518
Signed-off-by: Nmingming lee <mingming.lee@mediatek.com>