- 17 11月, 2019 24 次提交
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由 Heiko Stuebner 提交于
Add headers needed by the upcoming px30 support, including two new dt-binding headers taken from the Linux kernel. Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Heiko Stuebner 提交于
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
There are some code different with rockchip vendor code which may lead to different bugs, including: 1) Fix setting error about LPDDR3 dram size ODT. 2) Set phy io speed to 0x2. 3) Fix setting error about phy_pad_fdbk_drive. 4) Fix setting error about PI_WDQLVL_VREF_EN Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Update the calculation of the stride to support all the DRAM case. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The io setting are updated after some bugfix in different rk3399 boards, sync the code from vendor. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip vendor code; Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
Add capacity detect for rk3399 so that the driver able to detect the capacity automatically. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
Clean up the sdram_init to keep sync with rockchip source code. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
Correct the register to its correct name. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
Clean up rk3399 dram driver source code for more readable. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
For there are some structures and functions are common for all rockchip SoCs, migrate to use the common code so that we can clean up reduandent codes. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
RK3328 has a similar controller and phy with PX30, so we can use the common driver for it and remove the duplicate codes. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 YouMin Chen 提交于
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3. For TPL_BUILD, the driver implement full dram init and without DM support due to the limit of internal SRAM size. For SPL and U-Boot proper, it's a simple driver with dm for get dram_info like other SoCs. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The noc register bit definition may be the same for different SoC while the offset of the register may be different, add the struction definition as common code. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
This sdram_phy_px30.c is based on PX30 SoC, the functions are common for phy, other SoCs with similar hardware could re-use it. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common for controller, other SoCs with similar hardware could re-use it. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The debug info for dram is main about the capacity related info which is very important the board init, so set this default enable. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The functions for dram info print are part of common code. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
There are some function like os_reg setting, capacity detect functions, can be used as common code for different Rockchip SoCs, add a sdram_common.c for all these functions. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable name to what we real use to avoid confuse people. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Since we have new DRAM type and to support different DRAM size in different CS, we need more bits, so introduce sys_reg3 to record the info. Note that the info in sys_reg3 is extension to sys_reg2 and the info in sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as VERSION2. All the ENC macro are moved to sdram_common.h since the sdram.c only need to do the info decode. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The sdram.h suppose to be helper file for sdram.c which including dram size decode and some u-boot related dram init interface, and all structure and function for dram driver move to sdram_common.h Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c; so that we can use the file name sdram_common.c in dram driver for better understand the code; clean the related file who has use the header file at the same time. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The header file sdram.h is used for rk3288 and similar SoCs, rename it to make it more understandable. Signed-off-by: NYouMin Chen <cym@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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- 13 11月, 2019 4 次提交
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由 Tom Rini 提交于
- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This is size neutral outside of two platforms with latent bugs being fixed now and they no longer have "ENV_IS_NOWHERE" set along with their intended location.
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由 Tom Rini 提交于
Move this symbol to Kconfig. As part of this we can drop a UBI-specific symbol that was a stop-gap for not having this particular symbol in Kconfig. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather than defconfig, fix. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than defconfig, fix. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 12 11月, 2019 8 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx由 Tom Rini 提交于
u-boot-imx-20191105 ------------------- i.MX8MN SoC support ROM API image download support i.MX8MM enet enabling
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Rsync all defconfig files using moveconfig.py Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Vignesh Rajendran 提交于
With recent update in u-boot gitattributes all files are treated as regular text files. This creates problems with special files and repo always shows uncommitted files like below. Your branch is up-to-date with 'origin/master'. Changes not staged for commit: (use "git add <file>..." to update what will be committed) (use "git checkout -- <file>..." to discard changes in working directory) modified: tools/logos/compulab.bmp modified: tools/logos/denx-comp.bmp modified: tools/logos/toradex.bmp To fix above problem special files bmp/ttf files are treated as binary files in the gitattributes. Signed-off-by: NVignesh Rajendran <vignesh.rajendran@in.bosch.com> Signed-off-by: NVeeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
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由 Michael Trimarchi 提交于
The generated idbloader.img file that rockchip uses should be not included in git status report Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
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由 Simon Glass 提交于
A recent change adjusted the symbol calculation to work on x86 but broke it for Tegra. In fact this is because they have different needs. On x86 devices the code is linked to a ROM address and the end-at-4gb property is used for the image. In this case there is no need to add the base address of the image, since the base address is already built into the offset and image-pos properties. On other devices we must add the base address since the offsets start at zero. In addition the base address is currently added to the 'offset' and 'size' values. It should in fact only be added to 'image-pos', since 'offset' is relative to its parent and 'size' is not actually an address. This code should have been adjusted when support for 'image-pos' and 'size' was added, but it was not. To correct these problems: - move the code that handles adding the base address to section.py, which can check the end-at-4gb property and which property (offset/size/image-pos) is being read - add the base address only when needed (only for image-pos and not if the image uses end-at-4gb) - add a note to the documentation - add a separate test to cover x86 behaviour Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base) Signed-off-by: NSimon Glass <sjg@chromium.org> Tested-by: NStephen Warren <swarren@nvidia.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x40000 - Fix the u8 type comparision with '-1'. - Fix checkpatch warning for multi blank line and review signature.
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https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq由 Tom Rini 提交于
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC. - Few bug fixes and updates related to SPI, hwconfig, ethernet, fsl-layerscape, pci, icid, PSCI
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- 10 11月, 2019 4 次提交
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由 Kever Yang 提交于
This patch enable TPL support for firefly-rk3288 board, which works ths same way with other RK3288 board like Tinker, evb. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Levin Du 提交于
Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work as expected. When board_boot_order() `spl-boot-order.c` meets "same-as-spl", it gets the conf by looking the boot_devices table by boot source, and parse the node by the conf with: node = fdt_path_offset(blob, conf); which will failed without the "/" indicating the path. Currently only entries of boot_devices in rk3399 have the "/" prefix. Therefore add the missing ones in other boards. Signed-off-by: NLevin Du <djw@t-chip.com.cn> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config; default to 0x4000000(64MB) instead of 0x80000(512KB) for this address can support all the SoCs including those may have only 64MB memory, and also reserve enough space for atf, kernel(in falcon mode) loading. After the ATF entry move to 0x40000, the stack from 0x80000 may be override when loading ATF bl31. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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