flash_full_status_check() checks bit XSR.7 on Intel chips. This
should be done by only checking bit 7 and not by comparing the
whole status byte or word with 0x80.

This fixes the non-working block erase in the pflash emulation
of Qemu when used with the MIPS Malta board. MIPS Malta uses x32
mode to access the pflash device. In x32 mode Qemu mirrors the
lower 16 bits of the status word into the upper 16 bits. Thus
the CFI driver gets a status word of 0x8080 in x32 mode. If
flash_full_status_check() uses flash_isequal(), then it polls for
XSR.7 by comparing 0x8080 with 0x80 which never becomes true.
Reported-by: NAlon Bar-Lev <alon.barlev@gmail.com>
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NTom Rini <trini@konsulko.com>

Conflicts:
	arch/arm/cpu/armv8/Makefile
	arch/arm/lib/bootm-fdt.c

The PPA use PSCI to make secondary cores bootup. So when PPA was
enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method
between PSCI and spin-table.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Set the enable-method in the cpu node to PSCI, and create device
node for PSCI, when PSCI was enabled.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

If the PSCI and PPA is ready, skip the fixup for spin-table and
waking secondary cores. Otherwise, change SMP method to spin-table,
and the device node of PSCI will be removed.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.

Use the secure firmware framework to integrate FSL PPA into U-Boot.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This framework is introduced for ARMv8 secure monitor mode firmware.
The main functions of the framework are, on EL3, verify the firmware,
load it to the secure memory and jump into it, and while it returned
to U-Boot, do some necessary setups at the 'target exception level'
that is determined by the respective secure firmware.

So far, the framework support only FIT format image, and need to define
the name of which config node should be used in 'configurations' and
the name of property for the raw secure firmware image in that config.
The FIT image should be stored in Byte accessing memory, such as NOR
Flash, or else it should be copied to main memory to use this framework.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE has turned into another EL.

Define the function mmu_setup() for fsl-layerscape to cover the weak
one.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Drop platform code to create static MMU tables. Use common framework
to create MMU tables on the run. Tested on LS2080ARDB with secure and
non-secure ram scenarios.
Signed-off-by: NYork Sun <york.sun@nxp.com>

This should be spl_of_platdata, since otherwise it will try to run on boards
that don't support of-platdata.
Signed-off-by: NSimon Glass <sjg@chromium.org>

    Fix a number of typos, including:

     * "compatble" -> "compatible"
     * "eanbeld" -> "enabled"
     * "envrionment" -> "environment"
     * "FTD" -> "FDT" (for "flattened device tree")
     * "ommitted" -> "omitted"
     * "overriden" -> "overridden"
     * "partiton" -> "partition"
     * "propogate" -> "propagate"
     * "resourse" -> "resource"
     * "rest in piece" -> "rest in peace"
     * "suport" -> "support"
     * "varible" -> "variable"
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>

The code had assumed 4 CPUS before and now we have this configurable.
For now, set this to the previous default.

Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>

Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.
Signed-off-by: NYork Sun <york.sun@nxp.com>

When page tables are created, allow later table to be created on
previous block entry. Splitting block feature is already working
with current code. This patch only rearranges the code order and
adds one condition to call split_block().
Signed-off-by: NYork Sun <york.sun@nxp.com>

Make setup_pgtages() and get_tcr() available for platform code to
customize MMU tables.
Remove unintentional call of create_table().
Signed-off-by: NYork Sun <york.sun@nxp.com>

When secure ram is used, MMU tables have to be put into secure ram.
To use common MMU code, gd->arch.tlb_addr will be used to host TLB
entry pointer. To save allocated memory for later use, tlb_allocated
variable is added to global data structure.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Now that we have a secure data section for storing variables, there
should be no need for platform code to get the stack address.

Make psci_get_cpu_stack_top a local function, as it should only be
used in armv7/psci.S and only by psci_stack_setup.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Now that we have a secure data section and space to store per-CPU target
PC address, switch to it instead of storing the target PC on the stack.

Also save clobbered r4-r7 registers on the stack and restore them on
return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Now that we have a data section, add helper functions to save and fetch
per-CPU target PC.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The secure monitor may need to store global or static values within the
secure section of memory, such as target PC or CPU power status.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

sunxi and i.mx7 both define the __secure modifier to put functions in
the secure section. Move this to a common place.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Both sun6i and sun7i have 64 KB of secure SRAM.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

As the PSCI implementation grows, we might exceed the size of the secure
memory that holds the firmware.

Add a configurable CONFIG_ARMV7_SECURE_MAX_SIZE so platforms can define
how much secure memory is available. The linker then checks the size of
the whole secure section against this.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

psci_text_end was used to calculate the PSCI stack address following the
secure monitor text. Now that we have an explicit secure stack section,
this is no longer used.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Now that we have a secure stack section that guarantees usable memory,
allocate the PSCI stacks in that section.

Also add a diagram detailing how the stacks are placed in memory.

Reserved space for the target PC remains unchanged. This should be
moved to global variables within a secure data section in the future.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Until now we've been using memory beyond psci_text_end as stack space
for the secure monitor or PSCI implementation, even if space was not
allocated for it.

This was partially fixed in ("ARM: allocate extra space for PSCI stack
in secure section during link phase"). However, calculating stack space
from psci_text_end in one place, while allocating the space in another
is error prone.

This patch adds a separate empty secure stack section, with space for
CONFIG_ARMV7_PSCI_NR_CPUS stacks, each 1 KB. There's also
__secure_stack_start and __secure_stack_end symbols. The linker script
handles calculating the correct VMAs for the stack section. For
platforms that relocate/copy the secure monitor before using it, the
space is not allocated in the executable, saving space.

For platforms that do not define CONFIG_ARMV7_PSCI_NR_CPUS, a whole page
of stack space for 4 CPUs is allocated, matching the previous behavior.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The original PSCI implementation assumed CONFIG_ARMV7_PSCI_NR_CPUS=4.
Add this to platforms that have not defined it, using CONFIG_MAX_CPUS if
it is defined, or the actual number of cores for the given platform.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Targets that define CONFIG_ARMV7_SECURE_BASE will copy the secure section
to another address before execution.

Since the secure section in the u-boot image is only storage, there's
no reason to page align it and increase the binary image size.

Page align the secure section only when CONFIG_ARMV7_SECURE_BASE is not
defined. And instead of just aligning the __secure_start symbol, align
the whole .__secure_start section. This also makes the section empty,
so we need to add KEEP() to the input entry to prevent the section from
being garbage collected.

Also use ld constant "COMMONPAGESIZE" instead of hardcoded page size.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

sun7i has 2 CPUs.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This patch finishes the rewrite of sunxi specific PSCI parts into C
code.

The assembly-only stack setup code has been factored out into a common
function for ARMv7. The GIC setup code can be renamed as psci_arch_init.
And we can use an empty stub function for psci_text_end.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Every platform has the same stack setup code in assembly as part of
psci_arch_init.

Move this out into a common separate function, psci_stack_setup, for
all platforms. This will allow us to move the remaining parts of
psci_arch_init into C code, or drop it entirely.

Also provide a stub no-op psci_arch_init for platforms that don't need
their own specific setup code.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM,
micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector,
sdio attached rtl8189ftv wifi and an ir receiver.

The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This enables extra USB controllers which enable use of the 3rd USB
port on the new Orange Pi Plus 2E variant.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The Plus variant of the Orange Pi PC has an eMMC, add support for this.

Note we are using the same u-boot defconfig / dts for both the regular
Orange Pi PC as well as the Orange Pi PC Plus.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Now that we know that the BROM stores a value indicating the boot-source
at the beginning of SRAM, use that instead of trying to recreate the
BROM's boot probing.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

We always define CONFIG_MISC_INIT_R on sunxi and misc_init_r is never
called in the spl, so the linker will optimize it and parse_spl_header(),
of which it is the only caller, away.

On the tests I've done (Orange Pi PC build) the SPL actually becomes
8 bytes smaller with this patch.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Currently we fill ethaddr with a fixed unique address based on the SoCs
serial (from the sid) to make sure that boards which use the integrated
emac / gmac get a fixed mac rather then a random one.

On some boards the wifi does not come with a fixed mac either, so we need
to also set eth1addr.

This commit changes the ethaddr setting code to check for ethernet%d
aliases (as fdt_fixup_ethernet does) and set an ethaddr variable for
all present aliases.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>