It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.

With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes

mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage

Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug

Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>

For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed

If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>

Signed-off-by: NChris Moore <moore@free.fr>
Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr>

Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.

With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>

mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().

Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.
Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr>

Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr>

Generalized misuse of ble within relocation and bss
initialization loops caused one iteration too many.
Instead of ble ('branch if lower or equal'), use
blo ('branch if lower').

While we're at it, fix all 'addreee' typos.
Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr>

Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM.  The new
version adds support for up to 23 MAC addresses, instead of just 8.  Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".

Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

pumping line-rate traffic though a p4080 rev.2, which
is configured to encrypt packets prior to forwarding through
an IPsec tunnel, gets this error:

of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying
to share from itself or from another DECO but the two Non-SEQ LIODN
values didn't match or the "shared from" DECO's Descriptor required that
the SEQ LIODNs be the same and they aren't.

Since high traffic rates cause DECOs to begin to start sharing
shared descriptors amongst themselves, and DECOs inherit job queue
LIODNs when accessing shared descriptors, and a recently discovered
rev.2 h/w erratum requires all sharing job queues in a partition
have same liodn assignment, reassign the first job queue's liodn
assignment to the rest.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Manual was updated to add a new register for disabling CDQ speculation.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Make the U-Boot update command sequence conditional.  Helps prevent
  accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected.  Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information.  With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled.  Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.

The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz.  The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.

Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: NKai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.

Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

u-boot.bin can be loaded at any 4-byte aligned memory location and directly
'jumped' to using the 'go' command using the load address as the start
address. Doing so performs a 'warm boot' which skips memory initialisation
and other low-level initialisations, relocates U-Boot to upper memory and
starts U-Boot in RAM as per normal 'cold boot'

Provides a small speed increase and prepares for fully relocatable image.
Downside is the TEXT_BASE, bss, load address etc must ALL be aligned on a
a 4-byte boundary which is not such a terrible restriction as everything
is already 4-byte aligned anyway

Tidy up the linker script and discard some sections to save space

Create more generic names for the symbols exported from the linker script

By reserving space for the Global Data immediately below the stack during
assembly level initialisation, the C declaration of the static global data
can be removed, along with the 'RAM Bootstrap' function. This results in
cleaner code, and the ability to pass boot-up flags from assembler into C

By using another register, reduce code size by one instruction

%ebx will hold low-level boot flags and must be preserved

Using %ebp as a return pointer prevents creating 'load anywhere' images

To allow for 'load anywhere' images, the %ebp return pointer 'hack' must
be removed, so we cannot have two 'calls' to get_mem_size

Progress indication is not relocation friendly so remove it in
preperation for full relocatability support

Change to:
 - reparam=3
 - no-from-pointer
 - no-stack-protector
 - preferred-stack-boundary=2
 - no-top-level-reorder

These options make the code a little smaller and faster

Perform some basic code cleanups of the x86 files

Linux has C macros and code to load the GTD after switching to Protected
Mode. Using these greatly simplifies the assembler code

Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.

The header of recent Linux Kernels includes the size of the image, and
therefore is not needed to be passed to zboot. Still process the third
parameter (size of image) in the event that an older kernel is being loaded

Use TEXT_BASE rather than a hard-coded base address on x86 linker scripts.
This will allow any board to define its base link address without having
to modify the linker script