1. 31 8月, 2014 1 次提交
  2. 30 8月, 2014 28 次提交
  3. 29 8月, 2014 11 次提交
    • T
      Merge git://git.denx.de/u-boot-usb · 8f005b39
      Tom Rini 提交于
      8f005b39
    • T
      7f14fb20
    • T
      Merge branch 'master' of git://git.denx.de/u-boot-tegra · 5ddc3293
      Tom Rini 提交于
      5ddc3293
    • T
      5a1095a8
    • T
      Merge branch 'master' of http://git.denx.de/u-boot-sunxi · 6af857c5
      Tom Rini 提交于
      6af857c5
    • S
      usb: hub: don't check CONNECTION in hub_port_reset() · 74c0d756
      Stephen Warren 提交于
      One specific USB 3.0 device behaves strangely when reset by
      usb_new_device()'s call to hub_port_reset(). For some reason, the device
      appears to briefly drop off the bus when this second bus reset is
      executed, yet if we retry this loop, it'll eventually come back after
      another two resets.
      
      If USB bus reset is executed over and over within usb_new_device()'s call
      to hub_port_reset(), I see the following sequence of results, which
      repeats as long as you want:
      
      1) STAT_C_CONNECTION = 1 STAT_CONNECTION = 0  USB_PORT_STAT_ENABLE 0
      2) STAT_C_CONNECTION = 1 STAT_CONNECTION = 1  USB_PORT_STAT_ENABLE 0
      3) STAT_C_CONNECTION = 1 STAT_CONNECTION = 1  USB_PORT_STAT_ENABLE 1
      
      The device in question is a SanDisk Ultra USB 3.0 16GB memory stick with
      USB VID/PID 0x0781/0x5581.
      
      In order to allow this device to work with U-Boot, ignore the
      {C_,}CONNECTION bits in the status/change registers, and only use the
      ENABLE bit to determine if the reset was successful.
      
      To be honest, extensive investigation has failed to determine why this
      problem occurs. I'd love to know! I don't know if it's caused by:
      * A HW bug in the device
      * A HW bug in the Tegra USB controller
      * A SW bug in the U-Boot Tegra USB driver
      * A SW bug in the U-Boot USB core
      
      This issue only occurs when the device's USB3 pins are attached to the
      host; if only the USB2 pins are connected the issue does not occur. The
      USB3 controller on Tegra is in reset, so is not actively communicating
      with the device at all - a USB3 analyzer confirms this. Slightly
      unplugging the device (so the USB3 pins don't contact) or using a USB2
      cable or hub as an intermediary avoids the problem. For some reason,
      the Linux kernel (either on the same Tegra board, or on an x86 host)
      has no issue with the device, and I observe no disconnections during
      reset.
      
      This change won't affect any USB device that already works, since such
      devices could not currently be triggering the error return this patch
      removes, or they wouldn't be working currently.
      
      However, this patch is quite reliable in practice, hence I hope it's
      acceptable to solve the problem.
      
      The only potential fallout I can see from this patch is:
      
      * A broken device that triggers C_CONNECTION/!CONNECTION now causes the
        loop in hub_port_reset() to run multiple times. If it never succeeds,
        this will cause "usb start" to take roughly 1s extra to execute.
      
      * If the user unplugs a device while hub_port_reset() is executing, and
        very quickly swaps in a new device, hub_port_reset() might succeed on
        the new device. This would mean that any information cached about the
        original device (from the descriptor read in usb_new_device(), which
        simply caches the max packet size) might be invalid, which would cause
        problems talking to the new device. However, without this change, the
        new device wouldn't work anyway, so this is probably not much of a
        loss.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      74c0d756
    • M
      usb: Handle -ENODEV from usb_lowlevel_init() · 97b9eb9e
      Marek Vasut 提交于
      As we support both Host and Device mode operation, an OTG controller
      can return -ENODEV on a port which it found to be in Device mode during
      Host mode scan for devices. In case -ENODEV is returned, print that the
      port is not available and continue instead of screaming a bloody error
      message.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      97b9eb9e
    • M
      README.kconfig: document backward compatibility "make *_config" · d1b60d34
      Masahiro Yamada 提交于
      Commit 3ff291f3
      (kconfig: convert Kconfig helper script into a shell script)
      restored "<board>_config" target for backward compatibility.
      It should be documented.
      Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
      Reviewed-by: NStephen Warren <swarren@nvidia.com>
      d1b60d34
    • M
      tools/genboardscfg.py: change shebang into /usr/bin/env python2 · 2134342e
      Masahiro Yamada 提交于
      This tool only works on python 2 (python 2.6 or lator).
      
      Change the shebang to make sure the script is run by python 2
      and clearly say the supported version in the comment block.
      Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
      2134342e
    • S
      net: cpsw: am335x: Drop constant link checking from rx/tx path's · 5a834c1f
      Stefan Roese 提交于
      We noticed on the DXR2 platform (AM335x with a SMSC LAN9303 switch connected
      to the CPSW MAC) that the network performance in U-Boot is quite poor. Only
      when the transfer is started without a cable connected, and the cable is
      plugged after the first timeout "T" occured, an increased in performance
      can be seen. Debugging has revealed, that the cpsw driver has constant
      link checking builtin into the rx and tx functions. This results in the
      bad performance and seems to be unnecessary. The link has already been
      checked in the init function, before the transfer is started. This usually
      is sufficient.
      
      BTW: I have seen no other network driver in U-Boot so far, that constantly
      checks for link in the rx / tx functions.
      
      The performance numbers on the DXR2 board are:
      
      0.56 MiB/s	cpsw_check_link() in rx and tx path
      0.87 MiB/s	cpsw_check_link() only in tx path
      1.0  MiB/s	cpsw_check_link() only in rx path
      2.7  MiB/s	no cpsw_check_link() in rx and tx path
      
      So with this patch the network performance on DXR2 increases from 0.56
      to 2.7 MiB/s (nearly 5 times as fast).
      Signed-off-by: NStefan Roese <sr@denx.de>
      Tested-by: NSamuel Egli <samuel.egli@siemens.com>
      Tested-by: NHeiko Schocher <hs@denx.de>
      Cc: Vladimir Koutny <vladimir.koutny@streamunlimited.com>
      Cc: Mugunthan V N <mugunthanvnm@ti.com>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Cc: Tom Rini <trini@ti.com>
      5a834c1f
    • M
      tools/genboardscfg.py: improve performance · 9a65cb7f
      Masahiro Yamada 提交于
      I guess some developers are already getting sick of this tool
      because it generally takes a few minites to generate the boards.cfg
      on a reasonable computer.
      
      The idea popped up on my mind was to skip Makefiles and
      to run script/kconfig/conf directly.
      This tool should become about 4 times faster.
      You might still not be satisfied, but better than doing nothing.
      Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
      Acked-by: NSimon Glass <sjg@chromium.org>
      9a65cb7f