Since the FSP is a black box it helps to have some sort of debugging
available to check its inputs. If the debug UART is in use, set it up
after CAR is available.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

While queensbay is the first chip with these settings, others will want to
use them too. Make them common.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Tidy up the FSP support code a little.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.

This creates a generic PCI MMC device.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

For now this code seems to be the same for all FSP platforms. Make it
common until we see what differences are required.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

To avoid casts, find_fsp_header() should return a pointer. Add asmlinkage
to two API functions which use that convention. UPD_TERMINATOR is common
so move it into a common file.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

Since we must run a PCI BIOS ROM, and this can take a calamitous amount of
time, measure it using bootstage.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This setting will be used by more than just ivybridge so make it common.

Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Rather than requiring the Makefile to be modified, provide a build option to
enable the ROM to be built.

We cannot do this by default since it requires binary blobs. Without these
the build will fail.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a driver which locates the available XHCI controllers on the PCI bus
and makes them available.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Use the new utility function instead of local code.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This board uses a new PCI ID.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This board includes a few IDs we have not seen before.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

There is an existing function prototype in the header file but it is not
implemented. Implement something similar.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Sometimes microcode is delivered as a header file. Allow the tool to
support this as well as collecting multiple microcode blocks into a
single update.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

Signed-off-by: NTom Rini <trini@ti.com>

This results in a much more readable callgraph, because now they
can't be confused with the function having exactly the same name
in the generic mmc code.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This patch allows to configure all the important DRAM parameters in Kconfig.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

In addition to the current Android magic settings, allow to optionally use
DDR3 timing parameters, which are tailored for different clock frequencies
and JEDEC speed bins. This should improve reliability and performance.

Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig
allows to use timings, which are calculated for the DDR3-1066F speed bin.
A lot of DDR3 chips, which are used in real Allwinner based devices,
support DDR3-1066F speed bin timings.

And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work
with any DDR3 chips, because this targets the slowest JEDEC speed bins.

The vendor magic values are still used by default for DRAM, but board
maintainers now have more flexibility in DRAM timings selection.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an
unstable image when active low v or hsync is used.

The problem seems to be specific to the OLinuxIno A13 (normal & micro)
boards. I've just looked up the schematics and they use an opendrain driver
for the vga sync lines, and with sync pulses it is the logical high->low
edge of the pulse which counts for the timing, which with an active low
sync is being driven by the pull-up, and that simply seems to not drive
it hard enough to get a stable image.

So force v and hsync active high on these boards. independent of what the
modeline says. This fixes the unstable image.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Signed-off-by: NMichal Suchanek <hramrach@gmail.com>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This is a low-cost Allwinner A20 board with Arduino-style GPIO headers;
it features 1G RAM, 4G NAND flash, 1 micro-SD, 2 USB sockets, 1 micro
USB socket for OTG and another for power in, HDMI, SATA, 5V power for
SATA devices, gigabit Ethernet, an IR receiver, 3.5mm audio out and a
MIPI camera connector.

Like the BananaPi, this board needs GMAC_TX_DELAY set to 3 in order for
GMAC to work reliably at gigabit speeds.

For more details, see: http://linux-sunxi.org/LinkSprite_pcDuino3_NanoSigned-off-by: NAdam Sampson <ats@offog.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Keep all entries except for the monster entry at the top alphabetically sorted.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

It turns out that the device_mode_data is rsb specific, rather then slave
specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add support for the A80 to the rsb code.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the
dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some
special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i
boards have been moved over to using a single dram_sun5i_autoconfig file,
and the tx clk delay handling for the Banana boards now has its own Kconfig.

IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

And use this to set the GMAC Transmit Clock Delay Chain value on Banana
boards, rather then keying of CONFIG_TARGET_FOO.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Currently we've separate detailed dram settings for all sun5i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.

This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM,
mk802-a10s and r7-tv-dongle board.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control
USB1_VBUS.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

We do not need i2c support in the SPL when there is no PMIC (some sun4i
boards), or when the PMIC is not using i2c such as on sun6i and sun8i.

This reduces the SPL size from (e.g.) 21812 to 19260 bytes.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add an explanation for how to set up git so that patman can find the alias
file. Fix up the get_maintainers message too.
Reported-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NSimon Glass <sjg@chromium.org>