Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;

to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
Reported-by: NDean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Cleanup, move the declarations to keymile/common.h instead declaring them
per-board config.h
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NWasim Khan <wasim.khan@nxp.com>
Tested-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.

With the previous settings SPI-NAND reads over AHB were
corrupted.

Fixes: 91afd36f ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: NMathew McBride <matt@traverse.com.au>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>

Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.

Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.

Fixes: 91afd36f ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: NMichael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.ccSigned-off-by: NMark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.

It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.
Signed-off-by: NMathew McBride <matt@traverse.com.au>
Reviewed-by: NPratyush Yadav <p.yadav@ti.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Add basic support for the Hitachi Power Grids kmcent2 board, based
on the NXP QorIQ T1040 SoC.
Signed-off-by: NValentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Signed-off-by: NRainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: NNiel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>
[Fixed blank line at EOF errors]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().

In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.
Signed-off-by: NNiel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: NNiel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Add show_qrio function to print chip id and revision information.
There are already multiple QRIO chip versions available and the upcoming
designs may want to show used version.
Signed-off-by: NRainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.

Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.
Signed-off-by: NNipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.

We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.

This might leave a hole if there is no ethernet1 alias. This is
intended.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by: NFugang Duan <Fugang.duan@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Add dspi node into lx2162aqds device tree
Signed-off-by: NZhao Qiang <qiang.zhao@nxp.com>
[Rebased]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

disable non existing pcie controllers on lx2162aqds
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
	## Executing script at 80000000
	load - load binary file from a filesystemUsage:
	load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
	    - Load binary file filename from partition part on device
	       type interface instance dev to address addr in memory.
	      bytes gives the size to load in bytes.
	      If bytes is 0 or omitted, the file is read until the end.
	      pos gives the file byte position to start reading from.
	      If pos is 0 or omitted, the file is read from the start.
	...
	Bad Linux ARM64 Image magic!
	SCRIPT FAILED: continuing...
Signed-off-by: NBiwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.

Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.

Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: NMadalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.

Circumvent that by not disabling the write protection in the first
place.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.

Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.

For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/

Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

- introduces some standard sysinfo options as a source, e.g. to read
  strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
  support the build system adding information after U-Boot is built

While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.

The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.

Add some standard sysinfo options for this, and use them to obtain the
required information.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

These ops are missing at present which is not permitted. Add an empty
operation struct.

Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.

Fix it by moving the #ifdef.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.

Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.

Provide a function to update the version string.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

We can store this in the context and avoid passing it to each function.
This makes it easier to follow and will also allow keeping track of the
end of the string table (in future patches).

Add an 'eos' field to the context and create a function to set it up.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

At present we pass the ofnode to each function. We also pass the 'eos'
pointer for adding new strings. We don't track the current end of the
string table, so have smbios_string_table_len() to find that.

The code can be made more efficient if it keeps information in a
context struct. This also makes it easier to add more features.

As a first step, switch the ofnode parameter to be a context pointer.
Update smbios_add_prop() at the same time to avoid changing the same
lines of code in consecutive patches.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

We may as well include the U-Boot release information in the type-0 table
since it is designed for that purpose.

U-Boot uses release versions based on the year and month. The year cannot
fit in a byte, so drop the century.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

At present a few of the structs use u8 instead of char. This is a string,
so char is better. Update them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NChristian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This type is not used outside the smbios.c file so there is no need for it
to be in the header file. Move it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NChristian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

For SMBIOS we want to store the numeric version numbers in the tables. It
does not make sense to parse the strings. Instead, add new #defines with
the version and patchlevel.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

There are quite a few available version options in U-Boot. Add a list of
the available Makefile variables and #defines, along with examples.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>