Use alphabetical order for entries in sam9x60ek-u-boot.dtsi
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Update defconfigs for using common clock framework compatible
clocks.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Use CCF compatible for PMC. With this, the board/SoC will be
able to boot.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Use u-boot,dm-pre-reloc for slow xtal and main xtal.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Slow Xtal and Main Xtal are board specific. Add their proper
frequency to board file.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Add SAM9X60 clock support compatible with CCF.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>

syslog_test.h is in test/log/, not include/

Fixes: 52d3df7f ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

- Fix Octeon SPI driver for Octeon TX2
- Fix and enhance Octeon watchdog driver
- Misc minor enhancements to Octeon TX/TX2

- Bring in the next round of dev_xxx cleanup patches.

Now that linux/compat.h does not define these macros, we do not need to
undefine them.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

All users of these functions now include dm/device_compat.h directly.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Necessary for dev_xxx.
Signed-off-by: NTom Rini <trini@konsulko.com>

Necessary for dev_xxx.
Signed-off-by: NTom Rini <trini@konsulko.com>

Necessary for dev_xxx.
Signed-off-by: NTom Rini <trini@konsulko.com>

This driver doesn't use DM (in the correct places), so we use a device and
not a udevice. We also need to include device_compat.h
Signed-off-by: NSean Anderson <seanga2@gmail.com>

This was included, but was ifdef'd out. We also need dm.h for struct
udevice.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

This header is necessary for the dev_xxx macros.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

Enable WDT command for Octeon TX/TX2 boards.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

This patch enhances the Octeon TX/TX2 watchdog driver to fully enable
the WDT. With this changes, the "wdt" command is now also supported
on these platforms.
Signed-off-by: NSuneel Garapati <sgarapati@marvell.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Clock support is needed for all Octeon TX/TX2 boards. This patch selects
CONFIG_CLK so that it is available.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Remove a left-over debug test message from the Octeon TX / TX2
MMC driver.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>

Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

This includes device_compat.h, and fixes several calls to dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

This header is necessary for the dev_xxx macros.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

We call log_debug, but do not have a category set.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Necessary for dev_xxx.
Signed-off-by: NSean Anderson <seanga2@gmail.com>

- fsl_esdhc_imx cleanup
- not send cm13 if send_status is 0.
- Add reinit API
- Add mmc HS400 for fsl_esdhc
- Several cleanup for fsl_esdhc
- Add ADMA2 for sdhci

- Octeon TX: Add NAND driver (Suneel)
- Octeon TX: Add NIC driver driver (Suneel)
- Octeon TX2: Add NIC driver driver (Suneel)
- Armada 8040: Add iEi Puzzle-M80 board support (Luka)
- Armada A37xx SPI: Add support for CS-GPIO (George)
- Espressobin: Use Linux model/compatible strings (Andre)
- Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre)
- Armada A37xx: Small cleanup of config header (Pali)

- Add support for Linux "pstore" dumps.
- Button command fixup.
- gd cleanup and documentation.
- Assorted other cleanups.

Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in
Sphinx 3.

Use Sphinx.add_domain(, override=True) instead.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Set the defaults on probe for the packet buffer size registers
for the i210.

The TX/RX PBSIZE register of the i210 resets to its default value
only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5
chapter 8.3 'Internal Packet Buffer Size Registers'.

If something (another driver, another OS, etc.) modifies this register
from its default value, the e1000 driver doesn't function correctly. It
detects a hang of the transmitter and continuously resets the adapter.
Here we set this value to its default when resetting the i210 to
resolve this issue.
Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com>