Add support for using distro_bootcmd to the omap3_pandora target,
falling back to prior behavior.
Signed-off-by: NVagrant Cascadian <vagrant@debian.org>

We are supposed to not add config entries with only "default y"
in board/SoC Kconfig files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com>

If both SPL_DM and SPL_OF_CONTROL are enabled, SPL needs to bind
several devices, but CONFIG_SYS_MALLOC_F_LEN=0x400 is apparently
not enough.  Increase the default to 0x2000 for the case.  This
will be helpful for shorter defconfigs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and set its default value to 4; this
increases the number of supported CPUs for some boards.

It consumes 1KB memory per CPU for PSCI stack, but it should not
be a big deal, given the amount of memory used for the modern OSes.
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select.  Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

If CONFIG_ARMV7_NONSEC is enabled, the linker script requires
CONFIG_ARMV7_PSCI_NR_CPUS regardless of CONFIG_ARMV7_PSCI.
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

SPL_BUILD is not a CONFIG in Kconfig, so !SPL_BUILD is always true.
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

CONFIG_CMD_FS_GENERIC is enabled; use it to load the autoboot script,
rather than first attempting with fatload and falling back to
ext2load.
Signed-off-by: NVagrant Cascadian <vagrant@debian.org>
Acked-by: NGrazvydas Ignotas <notasas@gmail.com>

fatload/ext2load both require that the device and partition be
specified after specifying the device type. Specify the first
partition on mmc device 0, which is the only mmc device currently
configured on the pandora.
Signed-off-by: NVagrant Cascadian <vagrant@debian.org>
Acked-by: NGrazvydas Ignotas <notasas@gmail.com>

On all TI platforms the ROM defines a "downloaded image" area at or near
the start of SRAM which is followed by a reserved area.  As it is at
best bad form and at worst possibly harmful in corner cases to write in
this reserved area, we stop doing that by adding in the define
NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image
area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this.
At current we define the end of scratch space at 0x228 bytes past the
start of scratch space this this gives us a lot of room to grow.  As
these scratch uses are non-optional today, all targets are modified to
respect this boundary.

Tested on OMAP4 Pandaboard, OMAP3 Beagle xM

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Weber <weber@corscience.de>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: "B, Ravi" <ravibabu@ti.com>
Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: "Kipisz, Steven" <s-kipisz2@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Tested-by: NLokesh Vutla <lokeshvutla@ti.com>
Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
Tested-by: NLadislav Michl <ladis@linux-mips.org>

The PBIAS fixing is done in the MMC driver, and doing it in the
the board file conflicts with the driver causing intermittent
hangs on reboot.  Remove this from the board file and let
the driver do it.
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

All of the command files have moved to cmd directory, add description to
Directory Hierarchy.
Signed-off-by: NZiyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Sometimes boards may need more time to become stable network connection
due to several reasons:

- phy speed
- link-partner (switch)

Therefore we increase the retry-count to 10 for making sure that network
connection works always.
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NTom Rini <trini@konsulko.com>

An issue in the TI secure image generation tool causes the ROM to
load the SPL at a different load address than what is specified by
CONFIG_ISW_ENTRY_ADDR while doing a peripheral boot on HS devices.

This causes the SPL to fail on secure devices during peripheral
boot.

The TI secure image generation tool has been fixed so that the SPL
will always be loaded at 0x403018E0 by the ROM code for both
peripheral and memory boot modes.
Signed-off-by: NMadan Srinivas <madans@ti.com>
Reviewed-by: NNishanth Menon <nm@ti.com>
Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM57xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI DRA7xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable the platform-specific post-processing of FIT-extracted blobs such
as Kernel, DTB, and initramfs on TI AM43xx high-security (HS) devices
which will ultimately invoke a ROM-based API call that performs secure
processing such as blob authentication.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This reworks spl_set_header_raw_uboot to allow having both os boot
(which comes with a valid header) and aborting when no valid header is
found (thus excluding raw u-boot.bin images).
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Reviewed-by: NTom Rini <trini@konsulko.com>

When enabling a fixed regulator, it may take some time to rise to the
correct voltage.  If we do not delay here then subsequent operations
will fail.
Signed-off-by: NJohn Keeping <john@metanate.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Prior to this commit, the tool could not move options guarded by
CONFIG_SPL_BUILD ifdef conditionals because they do not show up in
include/autoconf.mk.  This new option, if given, makes the tool
parse spl/include/autoconf.mk instead of include/autoconf.mk,
which is probably preferred behavior when moving options for SPL.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Currently, the tool gives up moving an option quietly if its entry
was not found in Kconfig.

If the option is not defined in the config header in the first
place, it is no problem (as the Kconfig entry may have been hidden
by reasonable "depends on").

However, if the option is defined in the config header, the missing
Kconfig entry is a sign of possible behavior change.  It is highly
recommended to manually check if the option has been moved as
expected.  In this case, let's add "suspicious" in the log and
change the log color (if --color option is given) to make it stand
out.

This was suggested by Tom in [1].

[1] http://lists.denx.de/pipermail/u-boot/2016-July/261988.htmlSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The sets feature is handier for adding unique elements.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Since commit cc008299 ("tools: moveconfig: do not rely on type
and default value given by users"), we do not have this error case.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a pin controller driver for Meson GXBB adapted from Linux kernel.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Import DTS files and dt-bindings includes from Linux 4.8-rc1.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

In cases where the pins and groups definitions are in a sub-node, as:

	uart_a {
		mux {
			groups = "uart_tx_a", "uart_rx_a";
			function = "uart_a";
		};
	};

pinctrl_generic_set_state_subnode() returns an error for the top-level
node and pinctrl_generic_set_state() fails. Instead, return success so
that the child nodes are tried.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Commit 62afc601 introduced fpga image load via
bootm but broke the OS check in fit_image_load().

This commit removes following compiler warning:

---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
        os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
                                             ^  ~~~~~~~~~~~~
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation
        os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
                                             ^~
                                             |
1 warning generated.
--->8---
Signed-off-by: NAndreas Bießmann <andreas@biessmann.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

On the raspberry pi, you can disable the serial port to gain dynamic frequency
scaling which can get handy at times.

However, in such a configuration the serial controller gets its rx queue filled
up with zero bytes which then happily get transmitted on to whoever calls
getc() today.

This patch adds detection logic for that case by checking whether the RX pin is
mapped to GPIO15 and disables the mini uart if it is not mapped properly.

That way we can leave the driver enabled in the tree and can determine during
runtime whether serial is usable or not, having a single binary that allows for
uart and non-uart operation.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

So far we could only tell the gpio framework that a GPIO was mapped as input or
output, not as alternative function.

This patch adds support for determining whether a function is mapped as
alternative.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>

With commit ceec08f5, phy is connected to slave 0, but
changing the phy node was missed, fix it by populating the
phy node to proper cpsw slave node.

Fixes: ceec08f5 ("ARM: dts: dra72-evm: Add mode-gpios entry for mac node")
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: NTom Rini <trini@konsulko.com>

Casting "int"s to pointers is only valid for 32-bit systems.
Add the appropriate pointer type cast to avoid a compiler warning
when compiling for AArch64.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

There is no "CONFIG_MACH_SUN50I_A64" in upstream U-Boot, so fix
the name to prevent the option to be enabled.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This commit moved the SPL stack into SRAM C, which worked when the SPL
set the AHB1 clock down to 100 MHz to cope with the flaky SRAM C access
from the CPU.
However booting with boot0 (and thus not using SPL at all) we still run
with a 200 MHz AHB1, so any access to SRAM C is prone to fail.
Since this commit does _not_ only affect the SPL code, but also the
U-Boot proper, we fail when booting with boot0.

As the introduction of tiny-printf reduced the size of the SPL, we
can afford to have the SPL stack in SRAM A1.

This reverts commit 1a83fb4a
and fixes booting the Pine64 when using boot0.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.

The dts file is identical to the one submitted to the upstream kernel,
except that it has the pending patch to enable the ethernet controller
squashed in, as u-boot already has sun8i-emac support.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The Orange Pi 2 and Orange Pi Plus also come with ethernet, enable
support for this.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This adds an emac node to the orangepi-2 dts (not yet merged upstream,
but in u-boot we already have emac support); fixes the alphetically
sorting of nodes in sun8i-h3-orangepi-plus.dts and disables some
usb controllers in sun8i-h3-orangepi-plus.dts which are only used
on the plus2e, as upstream has decided to do a separate dts files
for the plus2e.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The sun8i-emac driver follows an old version of the proposed DT
bindings, where the EMAC clock and EPHY control register range is
listed directly, rather than through a syscon phandle.

Add back the syscon register range to avoid an invalid data access.
We should fix the driver once the Linux kernel bindings have been
finalized.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>