this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.

Boards remain compatible with OF_FLAT_TREE.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

also adds common prototypes to include/common.h.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly.  This patch also adds a /memory node if
it doesn't already exist prior to update.

plus some cosmetic trimming to single line comments.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

and reorder the existing 83xx maintainers alpha.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Remove a leftover in net/tftp.c while we're at it.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Minor path corrections needed to ensure buildability.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Remove a leftover in net/tftp.c while we're at it.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Commit 073e1b50 "Fix initrd/dtb
interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
when it should have gone inside of the conditional.  As a result, it
broke non-LIBFDT board builds.

Also added a missing "not." to the comment.
Signed-off-by: NGerald Van Baren <vanbaren@cideas.com>

Typically this causes scsi init to corrupt the
devlist and break the coninfo command.
Fix a compiler size warning.
Signed-off-by: NJason Jin <jason.jin@freescale.com>
Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com>
Acked-by: NAndy Fleming <afleming@freescale.com>

Signed-off-by: NSergey Kubushyn <ksi@koi8.net>

Signed-off-by: NWolfgang Denk <wd@denx.de>

The original code would wrongly relocate the blob to be right before
the initrd if it existed.  The blob *must* be within CFG_BOOTMAPSZ,
if it is defined.  So we make two changes:

1) flag the blob for relocation whenever its address is above BOOTMAPSZ

2) If the blob is being relocated, relocate it before kbd, not initrd
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.
Signed-off-by: NPeter Pearse <peter.pearse@arm.com>
Signed-off-by: NUlf Samuelsson <ulf@atmel.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.

Signed-off-by Randy Vinson <rvinson@mvista.com>

Author: Randy Vinson <rvinson@linuxbox.(none)>

Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
Arcadia main board.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

This patch is against u-boot-mpc85xx.git of www.denx.com
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NEbony Zhu <ebony.zhu@freescale.com>

This patch is against u-boot-mpc85xx.git of www.denx.com

Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.

Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).
Signed-off-by: NGreg Davis <DavisG@embeddedplanet.com>