Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

mx6sabreauto boards come with 32 MiB of parallel NOR flash.

Add support for it:

U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C:   ready
DRAM:  2 GiB
Flash: 32 MiB
NAND:  0 MiB

Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Many boards use a minimal .cfg file in the SPL case.

Introduce spl_sd.cfg so that we can reuse it.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.

i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.

Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.

Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.

Series-Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Tested-by: NStefano Babic <sbabic@denx.de>
Tested-by: NPhilippe Reynes <tremyfr@gmail.com>
Tested-by: NPhilippe Reynes <tremyfr@yahoo.fr>

Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to
1. So modify the default mmcdev in environment variables to dev 1.
Signed-off-by: NYe.Li <B37916@freescale.com>

The PFUZ probe failed with the following msg:
" wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=0
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=1
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=2
  i2c_init_transfer: give up i2c_regs=021a0000
  Can't find PMIC:PFUZE100 "

board_early_init_f is too early to call i2c related setting, because
init_func_i2c is called after board_early_init_f being invoked. Thus
move setup_i2c into board_init.

Also PFUZ is connected to I2C bus 0, so change "1" -> "0".

Using this patch PFUZ can be correctly probed:
"PMIC:  PFUZE100 ID=0x11"
Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

mkimage -T mxs now support new flag in config file:
DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM
instruction.
Signed-off-by: NAlexey Ignatov <lexszero@gmail.com>

The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display (optional, disabled by default)
  - Support ethernet
  - Support USB mass storage
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display
  - Support ethernet
  - Support USB mass storage
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The User Register in GMAC IP is used to select interface type.
When with GE feature, it is used to select interface between
RGMII and GMII. If without GE feature, it is used to select
interface between MII and RMII.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

As in SAMA5D4 SoC, the gf table in ROM code can not be seen.
So, when we try to use PMECC, we need to build it when do
initialization.
Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it
is defined we will build gf table runtime.

The PMECC use the BCH algorithm, so based on the build_gf_tables()
function in lib/bch.c, we can build the Galois Field lookup table.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin

this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

replaces the at91bootstrap code with SPL code.

make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin

this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

add support for using spl code on at91sam9260 and at91sam9g45
based boards.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
[adopt Bo's change in spl.c]
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

device ready pin is signalling that the device is ready on state 1
not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

erase one nand block in spl code. keep it simple, as size matters
This is used on the upcoming taurus spl support.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Acked-by: NScott Wood <scottwood@freescale.com>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

using this driver in SPL code with CONFIG_SPL_NAND_ECC
configured leads in an compileerror. Fix this.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
[fix subject]
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

enable to boot only a raw u-boot.bin image from nand with the
CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on
boards where spl space is low.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

- compile mpddrc ram init code also for AT91SAM9M10G45
  based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
  in the cr configuration
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

use the configure value for computing the ba_off value
not the value from the cr register. This leaded in a
wrong ram configuration on the upcoming corvus spl board
support.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h
and define a default value. Delete this define in the board
config files, where it is possible (all boards use currently
the same value).
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

generate the boot.bin file for all atmel SoC (arm920, arm926, armv7)
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
[fix subject]
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

We need to make sure the main clock ready field in MCFR is set
after switch to main crystal oscillator.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

When boot up without mac address setting, it will give the warning
message like: "Warning: failed to set MAC address", however when
execute network related command, it still execute them without any
warning information.

With this patch, it will exit directly with following information:
"gmac0: mac address is not valid"

It also solve the problem after bootup then set mac address and the
mac address won't set to net device issue.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Tested-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Common part of config for lager, koelsch, alt and gose board will be able to
replace rcar-gen2-common.h.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

The lager, koelsch, alt, gose board supported in rmobile is
distinguished as the R-Car Gen2 series and has much common setting.
This collect up the common part of config as rcar-gen2-common.h.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Gose board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Lager board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>