1. 26 6月, 2020 29 次提交
  2. 25 6月, 2020 4 次提交
    • T
      Merge tag 'xilinx-for-v2020.10' of... · f0e236c8
      Tom Rini 提交于
      Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
      
      Xilinx changes for v2020.10
      
      Versal:
      - xspi bootmode fix
      - Removing one clock from clk driver
      - Align u-boot memory setting with OS by default
      - Map TCM and OCM by default
      
      ZynqMP:
      - Minor DT improvements
      - Reduce console buffer for mini configurations
      - Add fix for AMS
      - Add support for XDP platform
      
      Zynq:
      - Support for AES engine
      - Enable bigger memory test by default
      - Extend documentation for SD preparation
      - Use different freq for Topic miami board
      
      mmc:
      - minor GD pointer removal
      
      net:
      - Support fixed-link cases by zynq gem
      - Fix phy looking loop in axi enet driver
      
      spi:
      - Cleanup global macros for xilinx spi drivers
      
      firmware:
      - Add support for pmufw reloading
      
      fpga:
      - Improve error status reporting
      
      common:
      - Remove 4kB addition space for FDT allocation
      f0e236c8
    • A
      common: fdt: Remove additional 4k space for fdt allocation · b8fd54d6
      Ashok Reddy Soma 提交于
      There is no technical reason to add additional 4k space for FDT. This space
      is completely unused and just increase memory requirements. This is
      problematic on systems with limited memory resources as Xilinx Zynq
      CSE/ZynqMP mini and Versal mini configurations.
      
      The patch is removing additional 4k space.
      
      EFI code is using copy_fdt() which copy FDT to different location.
      And all boot commands in case of using U-Boot's FDT pointed by
      $fdtcontroladdr are copying FDT to different locations by
      image_setup_libfdt().
      That's why in proper flow none should modified DTB used by U-Boot that's
      why there is no need for additional space.
      Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
      Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      b8fd54d6
    • M
      xilinx: zynqmp: Enable pmufw config reloading · e20d88bf
      Michal Simek 提交于
      PMU FW has functionality to accept and reload configuration object at run
      time. The patch is adding support for doing it via u-boot prompt.
      
      For example:
      tftpboot 100000 pmu_obj.bin
      zynqmp pmufw 100000 $filesize
      
      The most of pmufw configurations don't allow config reloading.
      Also official Xilinx PMUFW doens't support this feature properly but the
      patch should open a way to call PMUFW with this request.
      
      Here is example of PMUFW config fragment which enables config reloading.
      
      /* SET CONFIG SECTION */
      PM_CONFIG_SET_CONFIG_SECTION_ID,        /* Section ID */
      PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
      PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */
      Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
      e20d88bf
    • M
      arm64: zynqmp: Print multiboot reg in decimal · 3ccea69f
      Michal Simek 提交于
      It is better to print multiboot value in decimal because boot images are
      also composed in decimal not in hex.
      Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
      3ccea69f
  3. 24 6月, 2020 7 次提交