All boards define CONFIG_MX6, CONFIG_DISPLAY_BOARDINFO, CONFIG_DISPLAY_CPUINFO
and CONFIG_SYS_GENERIC_BOARD so define them in mx6_common
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini at konsulko.com>

The linux/sizes.h, asm/arch/imx-regs.h, asm/imx-common/gpio.h,
config_cmd_default.h includes are used fairly universally across imx6 boards
so include them in mx6_common.h by default.

We define CONFIG_SYS_NO_FLASH before config_cmd_default.h  so that we
don't have to undef CONFIG_CMD_FLASH / CONFIG_CMD_IMLS everywhere.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>

CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE should be selected only by boards that really
have a DDR-capable eMMC, so remove this option from common code to avoid
regressions.
Reported-by: NStefan Roese <sr@denx.de>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
Reviewed-by: NVolodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Tested-by: NStefan Roese <sr@denx.de>

Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.
Signed-off-by: NVolodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that
24Mhz OSC clock source will be selected for GPT on all MX6 platforms.
Signed-off-by: NYe.Li <B37916@freescale.com>

This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: NGabriel Huau <contact@huau-gabriel.fr>
Acked-by: NStefano Babic <sbabic@denx.de>

Commit e9fd66de (ARM: mx6: define CONFIG_ARM_ERRATA_742230) enables
errata 742230 for imx6, because it helps remove one reboot issue.
However, this errata does not really apply on imx6, because Cortex-A9
on imx6 is r2p10 while the errata only applies to revisions r1p0..r2p2.

At a later time, commit f71cbfe3 (ARM: Add workaround for Cortex-A9
errata 794072) adds support of errata 794072, which applies to all
Cortex-A9 revisions.  As the workaround for both errata are exactly
same, it makes a lot more sense to select 794072 instead of 742230 for
imx6.  Since we already enable 794072 for imx6, it's time to drop
errata 742230 to avoid confusion.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
Acked-by: NNitin Garg <nitin.garg@freescale.com>

Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>

Add L2 cache support and enable it by default.

Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NDirk Behme <dirk.behme@gmail.com>
Acked-by: NStefano Babic <sbabic@denx.de>

When changing LDO voltages we need to wait for the required amount of time
for the voltage to settle.

Also, as the timer is still not available when arch_cpu_init() is called, we
need to call it later at board_postclk_init() phase.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

The ARM errata 742230 - "ARM errata: DMB operation may be faulty" is
claimed for Cortex-A9 (r1p0..r2p2).  Though i.MX6 uses a newer revision
than r2p2, we are seeing a reboot failure on i.MX6 SMP build that can be
fixed by applying the workaround for this errata.  So for safety, let's
define CONFIG_ARM_ERRATA_742230 to enable the workaround on i.MX6.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Now that U-Boot has common CONFIG_ options to work around some ARM CPU
errata, enable the relevant options on MX6, and remove the custom
lowlevel_init.S, since it's just duplicated code now.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NJason Liu <r64343@freescale.com>

Common Tegra files are in arch-tegra, shared between T20/T30/T114.
Tegra114-specific headers are in arch-tegra114. Note that some of
these will be filled in as more T114 support is added (drivers,
WB/LP0 support, etc.).
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

Common Tegra files are in arch-tegra, shared between T20 and T30.
Tegra30-specific headers are in arch-tegra30. Note that some of
these will be filled in as more T30 support is added (drivers,
WB/LP0 support, etc.). A couple of Tegra20 files were changed
to support common headers in arch-tegra, also.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>