Enable power domain associated with the device when probe.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add CONFIG_SPL_POWER_DOMAIN config entry.
Build drivers/power/domain if this config is selected.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add dummy functions when CONFIG_POWER_DOMAIN not defined.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

The Assigned Clock parents and rates misses the fact that a "0" entry can
be passed to skip setting a parent or rate of an assigned clock as
described in the Linux clock bindings at [1].

This patch simply skips the clock reparenting if the DT parsing returns
-ENOENT and the clock rate setting if "0" is passed as clock rate.

[1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135

Fixes: f4fcba5c "clk: implement clk_set_defaults()"
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Update my e-mail address from samsung.com to denx.de
Signed-off-by: NLukasz Majewski <lukma@denx.de>

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.
Reported-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

As platform uses GPIOs for card detection, it's
simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH)
in the gpio flags instead of using the cd-inverted
property.
Reported-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Add missing clk_free() call in case of failure
when enabling the clock.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci
to support this config.

This driver is used by STM32Fx and by Vexpress platforms.
Only STM32Fx are DM ready. No DM code is isolated and will be
removed easily when wexpress will be converted to DM.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

CONFIG_BLK config flag becomes mandatory, enable it.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

CONFIG_BLK config flag becomes mandatory, enable it.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

CONFIG_BLK config flag becomes mandatory, enable it.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Now that we have moved to Sphinx documentation we don't need the docproc
app anymore, remove.
Signed-off-by: NTom Rini <trini@konsulko.com>

1947c2d2 introduces cache line flushes for the bootcounter, but if
the start address is not aligned then the flush causes warnings of
the form:

  CACHE: Misaligned operation at range [4030b7fc, 4030b83c]

Align both the start and end of the buffer (possibly crossing multiple
lines).

Fixes: 1947c2d2 ("bootcount: flush after storing the bootcounter")
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Even though the exception vector table is a fundamental part of the ARM
architecture, U-Boot mostly does not make real use of it, except when
crash dumping. But having it in takes up quite some space, partly due to
the architectural alignment requirement of 2KB. Since we don't take special
care of that, the compiler adds a more or less random amount of padding
space, which increases the image size quite a bit, especially for the SPL.

On a typical Allwinner build this is around 1.5KB of padding, plus 1KB
for the vector table (mostly padding space again), then some extra code
to do the actual handling. This amounts to almost 10% of the maximum image
size, which is quite a lot for a pure debugging feature.

Add a Kconfig symbol to allow the exception vector table to be left out
of the build for the SPL.
For now this is "default y" for everyone, but specific defconfigs,
platforms or .config files can opt out here at will, to mitigate the code
size pressure we see for some SPLs.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

The arm64 exception handling code is quite big, mostly due to
architectural alignment requirements. Each exception entry spans 32
instructions, which sounds generous, but is too small to fit all of the
save/branch/restore code in there. So at the moment we use only four
instructions, branching into shared save and restore routines.
To not leave the space for those remaining 28 instructions wasted, let's
split the save and restore routines and stuff them into the gaps.
This saves about 250 bytes of code, which is helpful for those tight
SPLs.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

Several boards do not use the default UART3, so they do a check
for ifdef CONFIG_SPL_BUILD and enable the pointer for
CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx.

Let's consoldate this all into one place, and remove them from the
individual boards.
Signed-off-by: NAdam Ford <aford173@gmail.com>

Enable ADC on stm32mp15.
- CONFIG_CMD_ADC
- CONFIG_STM32_ADC
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This patch adds support for STMicroelectronics STM32 ADC (analog to
digital converter). It's originally based on Linux kernel v4.18-rcs
drivers/iio/adc/stm32-adc*. It's composed of:
- core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu).
- child drivers (UCLASS_ADC) declare each ADC, channels and handle
  conversions.
This driver currently supports STM32H7 and STM32MP1 ADC.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This patch adds documentation of device tree bindings for the STM32 ADC.
It's based on linux-v4.18-rc* dt-bindings, at the time of writing:
- Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

device_get_supply_regulator() only needs to be called once.
But each time there's call to adc_vxx_value() for instance, it calls
adc_vxx_platdata_update() -> device_get_supply_regulator().

So, move device_get_supply_regulator() to pre_probe() routine.

This also allows vdd_supply/vss_supply to be provided directly from
uc_pdata, e.g dt-binding variant like stm32-adc provide its own
'vref-supply'.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add clk_valid() to check for optional clocks are valid.
Call clk_valid() in test/dm/clk.c and add relevant test routine to
sandbox clk tests.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Trivial Kconfig cleanup. Use tabs instead of spaces.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>

The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:

 * Gigabit capable PHY
 * Extra USB hub, optional i2c control
 * lps3331ap barometer connected over i2c
 * MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
 * 1GiB DDR3 RAM
 * RTL8723 Wifi/Bluetooth connected over USB
Signed-off-by: NKoen Kooi <koen@dominion.thruhere.net>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is
adapted from mailine kernel.
Signed-off-by: NStefan Mavrodiev <stefan@olimex.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This matches the compatible string used by the Linux kernel. This will
allow u-boot to use the same device tree files.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
[jagan: use armada instead of orion on .data]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Get the is_errata_50mhz_ac in .ofdata_to_platdata, and
reuse it in .set_mode this can eventually initialized
dt code at once and adding room to add platdata.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add support for SPANSION s25fl128l
Signed-off-by: NClément Laigle <c.laigle@catie.fr>
Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
[jagan: fixed , at the end of } ]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.

This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bd ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e63 ARM: tegra: avoid using secure carveout RAM

Cc: Mark Kettenis <kettenis@openbsd.org>
Cc: Alexander Graf <agraf@suse.de>
Acked-by: NTom Warren <twarren@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

At present this function takes a filename, but it is better to use an Fdt
object so that the caller can control this, perhaps obtainint the device
tree from a bytearray. Update the method accordingly and also fix a
confusing parameter name.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This property has been changed to 'offset'. To help downstream users who
might still be using 'pos', add a check that this is not used by mistake.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This function name is too generic for its purpose and is therefore
confusing. It actually only applies to blobs, so rename it to indicate
this.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present the map only shows the offset and size for each region. The
image position provides the actual position of each entry in the image,
regardless of the section hierarchy.

Add the image position to the map.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add support for U-Boot's TPL and TPL device tree. Also fix a few comments
in the other device-tree entries.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This adds support for a Chromium verified boot block, used to sign a
read-write section of the image.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a function which can decode a property containing a list of phandles.
This is useful for finding nodes linked to a property. Also provide a way
to look up a single phandle and get the Fdt object from a Node.
Signed-off-by: NSimon Glass <sjg@chromium.org>

When this fails it is useful to see the current directory, since U-Boot's
build system will typically change into the output directory during the
build. Add this information to the error.
Signed-off-by: NSimon Glass <sjg@chromium.org>