The mx5 lowlevel_init.S contains board-specific code based on the reference
design. Let's keep it since it avoids creating new lowlevel_init files and it
may be used by many boards. But add a config to make it optional in order not to
cause issues on boards not following this part of the reference design.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matt Sealey <matt@genesi-usa.com>
Acked-by: NStefano Babic <sbabic@denx.de>

The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NJason Liu <r64343@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NJason Liu <r64343@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

One second is enough time for users to react in case they want to stop the
booting process.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: NStefano Babic <sbabic@denx.de>

If a board does not enable CSPI, there is no need to show the CSPI clock
frequency as part of the 'clock' command.
Reported-by: NDirk Behme <dirk.behme@gmail.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NDirk Behme <dirk.behme@gmail.com>

Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.

Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes
always stable.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

In decode_cs() function the polarity of the chip select must be taken into
account.

Also, for the case of low active chip select, the CS was activated too early.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Print CSPI clock in 'clock' command.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Align SPI chip select naming with i.MX53 reference manual.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

A custom board_ehci_hcd_init() may be unneeded, so add a weak default
implementation doing nothing.

By the way, use simple __weak from linux/compiler.h for
board_ehci_hcd_postinit() instead of weak alias with full attribute.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add support for the OTG port on the mx35pdk Personality board.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: NStefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>

Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Use EHCI MXC configuration options for i.MX25.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matthias Weisser <weisserm@arcor.de>

Make EHCI power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like
MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT,
not the opposite.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Clean up ehci-mx5:
 - Fix column alignments.
 - Fix comments.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Clean up ehci-mxc:
 - Remove useless #if's.
 - Fix identation.
 - Issue a #error if used with an unsupported platform.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to
ehci-fsl.h so that all MXC SoCs can use them.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Only the values used in the sabrelite board are
added currently. Add more as other boards use them.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

Read memory setup registers to determine size
of available ram. This routine works for mx53/mx6x

I need this because when mx6solo called get_ram_size
with a too large maximum size, the system hanged.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

Use CONFIG_MX6 when the particular processor
variant isn't important.

Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

Previously, the same value was returned for both mx6dl and mx6solo.
Check number of processors to differeniate.
Also, a freescale patch says that sololite has its cpu/rev
stored at 0x280 instead of 0x260.
I don't have a sololite to verify.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

commit 199adb60 "common/misc: sparse
fixes" broke the help command trying to fix the sparse error
"command.c:44:38: error: bad constant expression".

As Henrik points out, the fix was bad because the commit used
CONFIG_SYS_MAXARGS whereas the code intended to use the maximum
number of commands (not arguments to a command).

Revert command.c changes to the original code as asked by Wolfgang.
Reported-by: NHenrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Microblaze platform can use CONFIG_OF_EMBED option
but also it is necessary to support boards
which don't want to use this option.
U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED
case that's why it should be guarded by ifdef.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

The patch
"include/linux/byteorder: import latest endian definitions from linux"
(sha1: eef1cf2d)

Introduced a lot of compilation failures with unknow types.
include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p':
include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in
include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p':
include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16'
...

Removing asm/bitops.h solved this problem.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Flushing caches is necessary because of soft reset
which doesn't clear caches.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
Reviewed-by: NMarek Vasut <marex@denx.de>

Just remove ancient code.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
Acked-by: NStephan Linz <linz@li-pro.net>
Reviewed-by: NMarek Vasut <marex@denx.de>