- 13 8月, 2015 8 次提交
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由 Jiandong Zheng 提交于
Enable BCM SF2 ethernet and PHY for BCM Cygnus SoC Signed-off-by: NJiandong Zheng <jdzheng@broadcom.com> Signed-off-by: NSteve Rae <srae@broadcom.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Heiko Schocher 提交于
add support for the at91sam9260 based board smartweb from siemens. SPL is used without serial support, as this SoC has only 4k sram for running SPL. Here a U-Boot bootlog: RomBOOT > U-Boot 2015.07-rc2-00109-g4ae828c (Jun 15 2015 - 09:31:16 +0200) CPU: AT91SAM9260 Crystal frequency: 18.432 MHz CPU clock : 198.656 MHz Master clock : 99.328 MHz Watchdog enabled DRAM: 64 MiB WARNING: Caches not enabled NAND: 256 MiB In: serial Out: serial Err: serial Net: macb0 Hit any key to stop autoboot: 0 U-Boot> Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
remove unneeded udelay() in this function, as we use the dev_ready pin. Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Heiko Schocher 提交于
This patch enables building SPL without CONFIG_SPL_SERIAL_SUPPORT support. Signed-off-by: NHeiko Schocher <hs@denx.de> [trini: Ensure we build arch/arm/imx-common on mx28] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Dennis Gilmore 提交于
remove options defined in the distro defaults add distro bot commands set scriptaddr value Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Dennis Gilmore 提交于
Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Dennis Gilmore 提交于
PXE: if a board has set its own value for CONFIG_BOOTP_VCI_STRING do not set the default one. Use the board set value instead Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Rob Herring 提交于
On the highbank platform the SoC's management controller firmware will probe the DRAM modules and populates the initial device tree with the correct values. Therefore the memory sizes in the DT are already correct, so remove U-Boot's DRAM bank setup so the memory node is not "fixed up" by u-boot. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NAndre Przywara <osp@andrep.de>
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- 12 8月, 2015 8 次提交
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由 Simon Glass 提交于
These were pointed out in review but I missed them. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
The return type of pmic_read and pmic_write is signed int, so correct variable 'ret' from type unsigned int to int. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com>
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由 Peng Fan 提交于
If enable DM PMIC and REGULATOR, we should not use original power framework. So need to comment out the pfuze code for original power framework, when CONFIG_DM_PMIC_PFUZE100 defined. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
1. Add new regulator driver pfuze100. * Introduce struct pfuze100_regulator_desc for maintaining info for one regulator. 2. Add new Kconfig entry DM_REGULATOR_PFUZE100 for pfuze100. 3. This driver intends to support PF100, PF200 and PF3000. 4. Add related macro definition in pfuze header file. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
1. Support driver model for pfuze100. 2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100 3. This driver intends to support PF100, PF200 and PF3000, so add the device id into the udevice_id array. 4. Rename PMIC_NUM_OF_REGS macro to PFUZE100_NUM_OF_REGS. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
We do not need that "regulator-name" property must be provided in dts. If "regulator-name" property is not provided in dts, node name will chosen for settings '.name' field of uc_pdata. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
If there is no property named 'regulator-name' for regulators, choose node name instead, but not directly return failure value. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits. So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2). Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 10 8月, 2015 2 次提交
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由 Hans de Goede 提交于
Currently the serial code assumes that there is always at least one serial port (and panics / crashes due to null pointer dereferences when there is none). This makes it impossible to use u-boot on boards where there is no (debug) serial port, because e.g. all uart pins are muxed to another function. This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which defaults to y (preserving existing behavior), which can be set to n on such boards to make them work. This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial, and is not necessary at this moment. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NSimon Glass <sjg@chromium.org>
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- 09 8月, 2015 1 次提交
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- 08 8月, 2015 21 次提交
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由 Hans de Goede 提交于
Add composite video out support. This only gets enabled on the Mele M3 for now, since that is were it was tested. It will be enabled on more boards after testing. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add support for interlaced modes, this is a preparation patch for adding composite out support. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add a few extra sunxi display registers and constant defines. Also rename some existing defines (e.g. dropping _GCTRL) and make some more generic (e.g. dropping the 2x scaling from SUNXI_LCDC_TCON1_TIMING_V_TOTAL). This is a preparation patch for adding composite video out support. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
We should only subtract 2 from the vblank time when using tcon1. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
All the #ifdef-ery in selecting the default and fallback monitor type is becoming unyielding and makes the code hard to read, replace it with a few helper functions. This will also be useful with the upcoming CHIP board which has display adapter daughterboards which should be runtime detectable. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Jesurun Q5 has the musb hooked up to an usb-a receptacle, enable it in host-only mode. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Do not add a bogus (pointing to a non existing serial port) stdout-path alias to dts on boards without a serial port. Note that we still define CONS_INDEX as this is used by the SPL where we do not use DM_SERIAL and thus CONFIG_REQUIRE_SERIAL_CONSOLE is not honored. We are getting away with this because the sun5i die actually has an uart0, which in the A13 package is not routed to the outside, so we are simply sending SPL bootup messages to the tx pin at the edge of the die, and they go no further from there... And sofar we only have one A13 board which does not have a serial port, all others do have a serial port. This kinda makes sense since the A13 is a much lower pincount package compared to all the other sunxi SoCs. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Now that we have code to check the id-pin and detect usb-host adapters plugged into the otg port that way, enable it on the tablets which I own. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
USB devices are not really designed to get the power bounced off and on at them. Esp. USB powered harddisks do not like this. Currently we power off the USB ports both on a "usb reset" and when booting the kernel, causing the usb-power to bounce off and then back on again. This patch removes the powering off calls, fixing the undesirable power bouncing. Note this requires some special handling for the OTG port: 1) We must skip the external vbus check if we've already enabled our own vbus to avoid false positives 2) If on an usb reset we no longer detect that the id-pin is grounded, turn off vbus as that means an external vbus may be present now Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Piotr Zierhoffer 提交于
When SPL_NAND_SUNXI option is selected in config, set some configuration options for sunxi NAND. This commit also introduces the configurable options in Kconfig. Signed-off-by: NPeter Gielda <pgielda@antmicro.com> Signed-off-by: NTomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: NMateusz Holenko <mholenko@antmicro.com> Signed-off-by: NPiotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: NKarol Gugala <kgugala@antmicro.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Piotr Zierhoffer 提交于
This driver adds NAND support to SPL. It was tested on Allwinner A20. Signed-off-by: NPeter Gielda <pgielda@antmicro.com> Signed-off-by: NTomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: NMateusz Holenko <mholenko@antmicro.com> Signed-off-by: NPiotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: NKarol Gugala <kgugala@antmicro.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Karol Gugala 提交于
To enable NAND flash in sunxi SPL, pins 0-6, 8-22 and 24 on port C are configured. Signed-off-by: NKarol Gugala <kgugala@antmicro.com> Signed-off-by: NPiotr Zierhoffer <pzierhoffer@antmicro.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Aleksei Mamlin 提交于
Enable the otg/drc usb controller on the Wexler TAB7200 tablet. Signed-off-by: NAleksei Mamlin <mamlinav@gmail.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Dinh Nguyen 提交于
Add code which uses the new functions for obtaining FPGA ID from the scan manager. This new code prints the FPGA model attached to the SoCFPGA during boot and sets environment variable "fpgatype", which can be used to determine the FPGA model in U-Boot scripts. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Dinh Nguyen 提交于
Add code to get the FPGA type for Altera's SoCFPGA family of FPGA. The code uses the scan manager to send jtag pulses that will return the FPGA ID. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Factor out the code which sends JTAG instruction followed by data into separate function to tidy the code up a little. Signed-off-by: NMarek Vasut <marex@denx.de> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Clean up the horrible macros present in the scan_manager.h . Firstly, the function scan_mgr_io_scan_chain_prg() is static, yet all the macros are used only within it, thus there is no point in having them in the header file. Moreover, the macros are just making the code much less readable, so remove them instead. Signed-off-by: NMarek Vasut <marex@denx.de> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Introduce generic function for accessing the JTAG scan chains in the SCC manager. Make use of this function throughout the SCC manager to replace the ad-hoc writes to registers and make the code less cryptic. Signed-off-by: NMarek Vasut <marex@denx.de> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Rework this function so it's clear that it is only polling for certain bits to be cleared. Add kerneldoc. Fix it's return value to be either 0 on success and -ETIMEDOUT on error and propagate this through the scan manager code. Signed-off-by: NMarek Vasut <marex@denx.de> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Dinh Nguyen 提交于
Fix build error for socfpga_cyclone5_defconfig: board/altera/socfpga/wrap_sdram_config.c:245:26: error: ‘RW_MGR_MEM_NUMBER_OF_RANKS’ undeclared here (not in a function) make[2]: *** [spl/board/altera/socfpga/wrap_sdram_config.o] Error 1 Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Fix most of the dangling checkpatch issues, no functional change. There are still 7 warnings, 1 checks , but those are left in place for the sake of readability of the code. Signed-off-by: NMarek Vasut <marex@denx.de> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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