This patch adds support for the OT1200 series of devices.

Following components are used in u-boot:
+ ethernet
+ i2c
+ emmc
+ gpio

For more details see README.

Changes v1 > v2
  - make use of enable_cspi_clock(..)
  - fix usage of OUTPUT_40OHM define
  - added README

Changes v2 > v3
  - improve spelling in README
  - added own copy of mx6q_4x_mt41j128.cfg
Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com>

Remove this tab from env, since it's useless, just use spaces.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Remove this tab from env, since it's useless, just use spaces.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Update DDR calibration settings based on a larger test set.

The initial values were gathered on a small number of boards,
and have been found to fail on some boards under load.
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

PERST_GPIO and POWER_GPIO are currently swapped.

Fix the GPIO assignments as per the board schematics.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Select CONFIG_CMD_FUSE so that the fuse API commands can be used.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Zeroing GD in board_init_f() is not needed any more. As its now done in
crt0.S. The patch that clears the GD in crt0.S is this one:

aae2aef9 [arm: Set up global data before board_init_f()] from Simon.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: NTim Harvey <tharvey@gateworks.com>

i.MX6SX ROM implements unified table sections.
The HAB function table is at offset 0x100. Update
the HAB function pointers accordingly.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>

Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2
arm2 board. Since the LPDDR2 arm2 board has different DDR size, use
CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE.
Signed-off-by: NYe.Li <B37916@freescale.com>

This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.

The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.
Signed-off-by: NYe.Li <B37916@freescale.com>

Enable the CONFIG_CMD_FS_GENERIC on m53evk to avoid per-fs specific commands
and tweak the environment to cater for this new option.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Enable the CONFIG_CMD_FS_GENERIC on m28evk to avoid per-fs specific commands
and tweak the environment to cater for this new option.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Make sure the boot.scr exists on the card before loading it
from the card to avoid annoying message on the console.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Make sure the boot.scr exists on the card before loading it
from the card to avoid annoying message on the console.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.

This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.
Signed-off-by: NYe.Li <B37916@freescale.com>

Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR
register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source,
do not reset this PFD to avoid system hang. Customers may set this
in DDR script or use BT_FREQ to select low freq boot.
Signed-off-by: NYe.Li <B37916@freescale.com>

1. Set the image load partition to the first FAT partition.
2. Set the kernel rootfs partition to the second partition.
Signed-off-by: NYe.Li <B37916@freescale.com>

To support loading FDT file for kernel, add the fdt address,
file and loading script to arm2 board default environment.
Signed-off-by: NYe.Li <B37916@freescale.com>

Add fine-tuning for the DRAM configuration according to the DRAM chip
datasheet. THis configuration applies to both Hynix HY5DU12622DTP and
Samsung K5H511538J-D43 .
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Enable the power to the USB port only when the USB port is really needed.
Do not enable the power unconditionally.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Instead of waiting for a fixed period of time and hoping for the best
that the DRAM will start, read back an EMI status register which tells
us exactly when the DRAM started.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

According to i.MX23 datasheet Table 32-17, we must wait for the supply
to settle before disabling the current limiter. Indeed, not waiting a
little here causes the system to crash at times.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

When CONFIG_SECURE_BOOT is enabled, the signed images
like kernel and dtb can be authenticated using iMX6 CAAM.
The added command hab_auth_img can be used for HAB
authentication of images. The command takes the image
DDR location, IVT (Image Vector Table) offset inside
image as parameters. Detailed info about signing images
can be found in Freescale AppNote AN4581.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>

Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related
to generic board support is not in place.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

We should pass the MMC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Provide cgtqmx6eval board its own variant of ddr
setup config file. Move board/freescale/imx/ddr/
mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/
as this is was designed for the mx6sabresd board.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Sabrelite board has two solts: 0 is SD3 (bottom) slot and 1 is uSD4 (top) slot.
This patch makes use of both slots instead of only one.
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: NEric Nelson <eric.nelson@boundarydevices.com>
Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: NEric Nelson <eric.nelson@boundarydevices.com>
Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>

Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related
to generic board not being supported.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

We should pass the SDHC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

We should not hardcode CONFIG_NETMASK in the config file.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Acked-by: NNikita Kiryanov <nikita@compulab.co.il>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Disable subpage write when using PMECC to prevent buggy partial page write.

This fix has been taken from linux sources (see commit
90445ff6241e2a13445310803e2efa606c61f276)
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Using CPU_HAS_PCR micro to present the SoC has pcr
(peripheral control register).
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

When use pcr (peripheral control register), then we won't need
to care about the peripheral ID.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>