Newer eSDHC controllers support ADMA2 descriptor tables which support
64bit DMA addresses. One notable user of addresses in the upper memory
segment is the EFI loader.

If support is enabled, but the controller doesn't support ADMA2, we
will fall back to SDMA (and thus 32 bit DMA addresses only).
Signed-off-by: NMichael Walle <michael@walle.cc>

Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: NMichael Walle <michael@walle.cc>

Currently, readl/writel and esdhc_read32/esdhc_write32 are used. To align
the usage, change to only use esdhc_read32/esdhc_write32.
Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>

free() checks if its argument in NULL. No need to check it twice.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.
Signed-off-by: NMichael Walle <michael@walle.cc>

First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.
Signed-off-by: NMichael Walle <michael@walle.cc>

Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.
Signed-off-by: NMichael Walle <michael@walle.cc>

SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.

Also make the error message more concise.
Signed-off-by: NMichael Walle <michael@walle.cc>

This 1ms delay before sending command already exist from the beginning
of the fsl_esdhc driver added in year 2008. Now this driver has been
split for two files: fsl_esdhc.c and fsl_esdhc_imx.c. fsl_esdhc_imx.c
only for i.MX series. i.MX series esdhc/usdhc do not need this 1ms delay
before sending any command. So remove this 1ms, this will save a lot
time if handling a large mmc data.
Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>

According to the code logic in __mmc_switch, if the parameter 'send_status'
is zero, no need to send cmd13, just wait the stated timeout time, then
can return directly.
Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>

Enable eMMC HS400 mode support on LX2160ARDB.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Add properties related to eMMC HS400 mode.

mmc-hs400-1_8v;
bus-width = <8>;

They had been already in kernel dts file since the first
lx2160ardb dts patch.

b068890 arm64: dts: add LX2160ARDB board support
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

There was a fix-up for eMMC HS400 stability issue in Linux.

Patch link:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
commit/?id=58d0bf843b49fa99588ac9f85178bd8dfd651b53

Description:
Currently only LX2160A eSDHC supports eMMC HS400. According to
a large number of tests, eMMC HS400 failed to work at 150MHz,
and for a few boards failed to work at 175MHz. But eMMC HS400
worked fine on 200MHz. We hadn't found the root cause but
setting eSDHC_DLLCFG0[DLL_FREQ_SEL] = 0 using slow delay chain
seemed to resovle this issue. Let's use this as fixup for now.

Introduce the fix-up in u-boot since the issue could be reproduced
in u-boot too.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock which was removed
accidentally.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

The process for eMMC HS400 mode for eSDHC is,

1. Perform the Tuning Process at the HS400 target operating frequency.
   Latched the clock division value.
2. if read transaction, then set the SDTIMNGCTL[FLW_CTL_BG].
3. Switch to High Speed mode and then set the card clock frequency to
   a value not greater than 52Mhz
4. Clear TBCTL[TB_EN],tuning block enable bit.
5. Change to 8 bit DDR Mode
6. Switch the card to HS400 mode.
7. Set TBCTL[TB_EN], tuning block enable bit.
8. Clear SYSCTL[SDCLKEN]
9. Wait for PRSSTAT[SDSTB] to be set
10. Change the clock division to latched value.Set TBCTL[HS 400 mode]
    and Set SDCLKCTL[CMD_CLK_CTRL]
11. Set SYSCTL[SDCLKEN]
12. Wait for PRSSTAT[SDSTB] to be set
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
15. Set TBCTL[HS400_WNDW_ADJUST]
16. Again clear SYSCTL[SDCLKEN]
17. Wait for PRSSTAT[SDSTB] to be set
18. Set ESDHCCTL[FAF]
19. Wait for ESDHCCTL[FAF] to be cleared
20. Set SYSCTL[SDCLKEN]
21. Wait for PRSSTAT[SDSTB] to be set.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Add a mmc_hs400_prepare_ddr() interface for controllers
which needs preparation before switching to DDR mode for
HS400 mode.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Some controllers may have difference between HS200 tuning
and HS400 tuning, such as different registers setting,
different procedure, or different errata.

This patch is to add a hs400_tuning flag to identify the
tuning for HS400 mode.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Clean TBCTL[TB_EN] manually during init since it is not able to
be reset by reset all operation.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Support tuning process for eMMC HS200 for eSDHC.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Add a reinit() callback for mmc rescan.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

For DM_MMC, the controller re-initialization is needed to
clear old configuration for mmc rescan.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

- Assorted improvements to our log functionality.

doc/README.log was already moved to doc/develop/logging.rst but has been
recreated by an incorrect merge.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Since the previous patch, net_init now exposes some errors, so check for
them.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

net_init does not always succeed, and there is no existing mechanism to
discover errors. This patch allows callers of net_init (such as net_init)
to handle errors. The root issue is that eth_get_dev can fail, but
net_init_loop doesn't expose that. The ideal way to fix eth_get_dev would
be to return an error with ERR_PTR, but there are a lot of callers, and all
of them just check if it's NULL. Another approach would be to change the
signature to something like

int eth_get_dev(struct udevice **pdev)

but that would require rewriting all of the many callers.
Signed-off-by: NSean Anderson <seanga2@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver interferes with other sandbox tests since it causes log output
to be interspersed with "No ethernet found." messages. Disable this driver
by default.

Enable it for the syslog tests so that they still pass.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present all log devices are enabled by default. Add a function to allow
devices to be disabled or enabled at runtime.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This is not needed as the Makefile only builds the file if CONFIG_LOG_TEST
is enabled. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present there is no way to disable a log driver. But the syslog driver
causes (attempted) network traffic in sandbox every time a log message
is printed, which is often.

Add a flag to enable a log driver. Adjust struct log_device to use a short
for next_filter_num so that no more memory is used for devices. Also fix
a missing line in the struct log_driver comment while here.

To maintain compatibility, enable it for all drivers for now.
Signed-off-by: NSimon Glass <sjg@chromium.org>

It is sometimes useful to output hex dumps in SPL. Add a config option to
allow this.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NStefan Roese <sr@denx.de>

At present if CONFIG_LOG enabled, putting LOG_DEBUG at the top of a file
(before log.h inclusion) causes _log() to be executed for every log()
call, regardless of the build- or run-time logging level.

However there is no guarantee that the log record will actually be
displayed. If the current log level is lower than LOGL_DEBUG then it will
not be.

Add a way to signal that the log record should always be displayed and
update log_passes_filters() to handle this.

With the new behaviour, log_debug() will always log if LOG_DEBUG is
enabled.

Move log_test_syslog_nodebug() into its own file since it cannot be made
to work where it is, with LOG_DEBUG defined.
Signed-off-by: NSimon Glass <sjg@chromium.org>

- Re-organize a number of Kconfig related entries to be better organized
  for long term maintenance.

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

At present MKIMAGE_DTC_PATH is in the devicetree menu but not within
'devicetree control' since it does not relate to that. As a result it
shows up in the top menu.

It actually relates to the mkimage tool, so create a new tools menu for it
and move it there.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This actually relates to something displayed on start-up, so move it into
that menu.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This option does not belong at the top level. Move it under generic
driver options.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This relates to the environment so should not be at the top level. Move
it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

These are start-up hooks so put them under that menu.
Signed-off-by: NSimon Glass <sjg@chromium.org>

These hooks relate to U-Boot init so move them under that menu.
Signed-off-by: NSimon Glass <sjg@chromium.org>

There are quite a few options at the top level relating to U-Boot init.
Move them into their own menu.
Signed-off-by: NSimon Glass <sjg@chromium.org>