Add an explanation for how to set up git so that patman can find the alias
file. Fix up the get_maintainers message too.
Reported-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This brings in a additional small fix which was missed in a recent update
to the README.
Suggested-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

True commit lines start at column zero.  Anything that is indented
is part of the commit message instead.  I noticed this by trying to
run buildman with commit e3a4facd
as master, which contained a reference to a Linux commit inside
the commit message.  ProcessLine saw that as a genuite commit
line, and thus buildman tried to build it, and died with an
exception because that SHA is not present in the U-Boot tree.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NSimon Glass <sjg@chromium.org>

When run with the --dry-run argument patman prints out information
showing what it would do.  This information currently doesn't line up
with what patman/git send-email really do.  Some basic examples:
- If an email address is addressed via "Series-cc" and "Patch-cc" patman
  shows that email address would be CC-ed two times.
- If an email address is addressed via "Series-to" and "Patch-cc" patman
  shows that email address would be sent TO and CC-ed.
- If an email address is addressed from a combination of tag aliases,
  get_maintainer.pl output, "Series-cc", "Patch-cc", etc patman shows
  that the email address would be CC-ed multiple times.

Patman currently does try to send duplicate emails like the --dry-run
output shows, but "git send-email" intelligently removes duplicate
addresses so this patch shouldn't change the non-dry-run functionality.

Change patman's output and email addressing to line up with the
"git send-email" logic.  This trims down patman's dry-run output and
prevents confusion about what patman will do when emails are actually
sent.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

It is painful to specify the full path to the device tree with the -d
option. It is normally kept in the same directory as U-Boot, so provide
an option to use this by default.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The other boards got updated to the standard binding. Update sandbox as
well.
Signed-off-by: NSimon Glass <sjg@chromium.org>

If for some reason DMA module fails to reset user oserves only this:
--->---
# dhcp
Trying dwmac.e0018000
FAIL
--->---

This message makes not much sense.
With proposed change error message will be more helpful:
--->---
# dhcp
Trying dwmac.e0018000
DMA reset timeout
FAIL
--->---

For example user may do power toggle to recover board functionality.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@ti.com>
Acked-by: NPavel Machek <pavel@denx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

This patch adds a phy driver for the Micrel KSZ8895 switch.  As the SoC MAC
is directly connected to the switch MAC the link to the switch is always up.

But the KSZ8895 switch can be hardwired in three configuration modes :
- not configurable with eventually an eeprom-stored configuration
- configurable by the mdio/mdc connection (SMI protocol)
- configurable by a SPI connection.

In not configurable mode, the switch starts automatically, but in the
other modes, it must be started programmatically, by writing 1 in
configuration register 1.
We only support the not configurable and mdio/mdc (aka SMI) modes here.
Signed-off-by: NPhilippe De Muyter <phdm@macqel.be>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

If the PHY is not recognized don't access phydev (NULL)
and return 0 to signal failure.
Signed-off-by: NClaudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

SCTLR is the abbreviation of System Control Register, so we should
use SCTLR but not SCTRL.
Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>

There are missing parameters in help which fpga dump command
requires.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Versatile Express ARMv8 semihosted FVP platform is still
using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
some compile-time flags. Get rid of this and create a Kconfig
entry for the FVP model, and a selectable bool for the
semihosting library.

The FVP subboard is now modeled as a target choice so we can
eventually choose between different ARMv8 versatile express
boards (FVP, base model, Juno...) this way. All dependent
symbols are updated to reflect this.

The 64bit Versatile Express board symbols are renamed
VEXPRESS64 so we have some chance to see what is actually
going on. Tested on the FVP fast model.
Acked-by: NSteve Rae <srae@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add documentation on how to setup a system to use the generic distro
configs and boot commands. This spells out what is needed to make a
system conformant, but does not limit the board to only the defaults.
Signed-off-by: NDennis Gilmore <dennis@ausil.us>
[swarren, added concept, user config, BOOT_TARGET_DEVICES sections.
edited the rest]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>

Fix this:
warning: cast from pointer to integer of different size
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>

only tested tested under QEMU with vexpress_ca9x4 ("-M vexpress-a9") and
vexpress_ca15_tc2 ("-M vexpress-a15"). Makes the ugly warning go away.
Signed-off-by: NChris Kuethe <chris.kuethe+github@gmail.com>

Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Remove the additional ',' and '\n' from the gettime command help.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.

The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Move this driver to use driver model and update the snow configuration to
match.
Signed-off-by: NSimon Glass <sjg@chromium.org>

These functions are useful in case the board calls them. Also fix a missing
parameter caused by applying the wrong patch (actually I failed to send v2
and applied v1 by mistake).
Signed-off-by: NSimon Glass <sjg@chromium.org>

The EC has no concept of offset, so use a value of 0.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Since U-Boot can support different offset lengths (0-4 bytes), add a device
tree property to specify this. This avoids hard-coding it in the driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when all the i2c peripheral
drivers will use dm i2c framework.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>

This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when the dm pmic framework will
be finished.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>

This change fixes i2c bus numbering for Odroid U3.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>

This commit adjusts the s3c24x0 driver to new i2c api
based on driver-model. The driver supports standard
and high-speed i2c as previous.

Tested on Trats2, Odroid U3, Arndale, Odroid XU3
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Tested-by: NSimon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Some versions of Exynos5 supports High-Speed I2C,
on few interfaces, this change allows support this.
The new flag is: PINMUX_FLAG_HS_MODE
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Without this alias setting, the seq numbers
of the i2c devices are wrong.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>

This patch modify i2c nodes in exynos4.dtsi with:
- adding proper interrupts arrays for each i2c node,
  which allows to decode periph id
- add reg address for each i2c node for i2c driver internal use
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>