main.c: In function 'readline_into_buffer':
main.c:927: warning: unused variable 'p_buf'
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NRodolfo Giometti <giometti@linux.it>

Lines of the lenght CONSOLE_COLS or greater than CONSOLE_COLS
are not displayed correctly. This is an attempt to fix
this issue. Also add carriage return handling.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NRodolfo Giometti <giometti@linux.it>

Clear possible errors in MCSR resulting from data-eye-search.
If not done, then we could get an interrupt later on when
exceptions are enabled.
Signed-off-by: NStefan Roese <sr@denx.de>

Rework Lime support for lwmon5 using new video driver
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

The DDR doesn't work on the 266MHz data rate,
the patch fix the bug.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Format the code, make it more readable
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Reduce the AL from 2 to 1 clock to improve the performance.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

According to the latest user manual of MPC8315E,
1) The SVCOD of HRCWL is different than 837x
2) The SCCR has changes
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The SPCR about TSEC priority is wrong.
Signed-off-by: NMichael Barkowski <Michael.Barkowski@freescale.com>
Signed-off-by: NJoe D'Abbraccio <Joe.D'abbraccio@freescale.com>
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Fix the typo in global_data.h
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

clean up the cache config from configs.h of board
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
  BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
  DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
  connected to SPI.

Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

New device trees will use "fsl,qe" compatible properties.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

the new libfdt code only updates eth0 if CONFIG_HAS_ETH0
is defined; add the define to the missing board configs.

Thanks to Emilian Medve for finding this.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Configure the number of bits used to address the banks inside the SDRAM
device.  The default register value of 0 means 2 bits to address 4 banks.
Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks.
Signed-off-by: NBecky Bruce <bgill@freescale.com>

vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash

After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)
Signed-off-by: NNiklaus Giger <niklaus.giger@netstal.com>

Signed-off-by: NLarry Johnson <lrj@acm.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NScott McNutt <smcnutt@psyent.com>

Change return values of init() functions in all Ethernet drivers to conform
to the following:

    >=0: Success
    <0:  Failure

All drivers going forward should return 0 on success.  Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
Acked-by: NStefan Roese <sr@denx.de>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Acked-By: NTimur Tabi <timur@freescale.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

These boards weren't updated by Kumar's config patch because they
weren't in the tree, yet.
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it.  Add function qe_upload_firmware() to parse the blob and
perform the actual upload.  Add command-line command "qe fw" to take a firmware
blob in memory and upload it.  Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware.  Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Signed-off-by: NTimur Tabi <timur@freescale.com>

Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for Instituto Atlantico's ATUM8548 board
Signed-off-by: Nrobert lazarski <robertlazarski@gmail.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Add support for Instituto Atlantico's ATUM8548 board
Signed-off-by: Nrobert lazarski <robertlazarski@gmail.com>

Add support for Wind River's SBC8548 reference board.

Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>

Add support for Wind River's SBC8548 reference board.

Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Signed-off by: Andy Fleming <afleming@freescale.com>

To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
be set up appropriately.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>