1. 04 11月, 2011 15 次提交
  2. 03 11月, 2011 12 次提交
  3. 02 11月, 2011 4 次提交
  4. 01 11月, 2011 3 次提交
  5. 28 10月, 2011 6 次提交
    • K
      e1000: Allow direct access to the E1000 SPI EEPROM device · ce5207e1
      Kyle Moffett 提交于
      As a part of the manufacturing process for some of our custom hardware,
      we are programming the EEPROMs attached to our Intel 82571EB controllers
      from software using U-Boot and Linux.
      
      This code provides several conditionally-compiled features to assist in
      our manufacturing process:
      
        CONFIG_CMD_E1000:
          This is a basic "e1000" command which allows querying the controller
          and (if other config options are set) performing EEPROM programming.
          In particular, with CONFIG_E1000_SPI this allows you to display a
          hex-dump of the EEPROM, copy to/from main memory, and verify/update
          the software checksum.
      
        CONFIG_E1000_SPI_GENERIC:
          Build a generic SPI driver providing the standard U-Boot SPI driver
          interface.  This allows commands such as "sspi" to access the bus
          attached to the E1000 controller.  Additionally, some E1000 chipsets
          can support user data in a reserved space in the E1000 EEPROM which
          could be used for U-Boot environment storage.
      
        CONFIG_E1000_SPI:
          The core SPI access code used by the above interfaces.
      
      For example, the following commands allow you to program the EEPROM from
      a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled):
        usb start
        fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin
        e1000 0 spi program $loadaddr 0 1024
        e1000 0 spi checksum update
      
      Please keep in mind that the Intel-provided .eep files are organized as
      16-bit words.  When converting them to binary form for programming you
      must byteswap each 16-bit word so that it is in little-endian form.
      
      This means that when reading and writing words to the SPI EEPROM, the
      bit ordering for each word looks like this on the wire:
      
        Time >>>
      ------------------------------------------------------------------
        ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
      ------------------------------------------------------------------
        (MSB is 15, LSB is 0).
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Cc: Ben Warren <biggerbadderben@gmail.com>
      ce5207e1
    • K
      e1000: Export core EEPROM access functions for SPI support · 2326a94d
      Kyle Moffett 提交于
      A followup patch will be adding a configurable feature to enable
      programming of E1000 EEPROMs from the command line or via the generic
      U-Boot SPI interface.
      
      In order for it to work it needs access to certain E1000-internal
      functions, so export those in the e1000.h header file.
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Cc: Ben Warren <biggerbadderben@gmail.com>
      2326a94d
    • K
      e1000: Rewrite EEPROM checksum error to give more information · 114d7fc0
      Kyle Moffett 提交于
      As an aide to debugging, we should print out the expected value of the
      EEPROM checksum in addition to just saying that it is wrong.
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Cc: Ben Warren <biggerbadderben@gmail.com>
      114d7fc0
    • K
      e1000: Restructure and streamline PCI device probing · d60626f8
      Kyle Moffett 提交于
      By allocating the e1000 device structures much earlier, we can easily
      generate better error messages and siginficantly clean things up.
      
      The only user-visable change (aside from reworded error messages) is
      that a detected e1000 device which fails to initialize due to software
      or hardware error will still be allocated a device number.
      
      As one example, consider a system with 2 e1000 PCI devices where the
      first controller has a corrupted EEPROM.  Using the old code the
      second controller would be "e1000#0", while with this change it would be
      "e1000#1".
      
      This change should hopefully make such EEPROM errors much more
      straightforward to handle correctly in boot scripts and the like.
      
      It is also necessary for a followup patch which allows SPI programming
      of an e1000 controller's EEPROM even if the checksum is invalid.
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Cc: Ben Warren <biggerbadderben@gmail.com>
      d60626f8
    • K
      e1000: Clean up handling of dual-port NICs and support 82571 · 987b43a1
      Kyle Moffett 提交于
      Consolidate the test for a dual-port NIC to one location for easy
      modification, then fix support for the dual-port 82571.
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      987b43a1
    • S
      zlib: Fix integer cast of pointer · 41d68b32
      Simon Glass 提交于
      Fix to cast an integer to a pointer using uintptr_t.
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      41d68b32