Fix checkpatch WARNING and CHECK issues
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Fix checkpatch WARNING and CHECK issues
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Fix checkpatch WARNING and CHECK issues
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Extract all sysboot command related code from pxe.c to new sysboot.c
Update Kconfig to insure that DISTRO_DEFAULT select new CMD_SYSBOOT
command.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

As sysboot and pxe commands are sharing piece of code, migrate this
common code into a new file pxe_utils.c to prepare sysboot command
code extraction from pxe.c
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Migrate from_env() from pxe.c to nvedit.c as it's not pxe specific.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs

Due to the (seemingly bogus) assumption of a default
CONFIG_SYS_UBOOT_START value we will revert this change for now and
evaluate it again for the next release along with changes to
CONFIG_SYS_UBOOT_START.

This reverts commit d3e97b53.
Signed-off-by: NTom Rini <trini@konsulko.com>

- Assorted omapl138_lcdk / da850-evm fixes
- FAT fix, add another pytest as well for FAT.
- Assorted general fixes

Recent versions of the Linux kernel with many options enabled have
grown large enough to overwrite the beginning of the initrd. For
example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB,
while only 31.5 MiB are available between kernel_addr_r and
ramdisk_addr_r.

This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399,
allowing for much larger kernels.
Signed-off-by: NBen Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

This enables reading of the cpuid and a static MAC address.
Signed-off-by: NBen Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.

For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.

So add a type IOMUX_8WIDTH_2BIT to calculate offset.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

When we want to use plus pinctrl feature, we need to enable
them at spl.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

This PWM driver can be used to support pwm functions
for on all Rockchip Socs.

The previous chips than RK3288 did not support polarity,
and register layout was different from the RK3288 PWM.

The RK3288 keep the current functions.

RK3328 and the chips after it, which can support hardware lock,
configure duty, period and polarity at next same period, to
prevent the intermediate temporary state.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The Firefly ROC_RK3308_CC use ref_clock of input mode,
and rmii pins of m1 group.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add the glue code to allow the rk3308 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

This is a core board named Core-PX30-JD4 with a mainboard from Firefly,
name it as firefly-px30 for now.
This board can re-use the dts of PX30, the only difference is the UART IO,
the firefly use UART2 M1 while evb use UART2 M0.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

serial# is one of the vendor properties and thus protected from being
overwritten if already set. If env_set is called anyway this result in
some nasty warnings, so check for presence before trying that.

In the same direction check for the presence of cpuid# and compare it
to the actual hardware and emit a warning if they don't match.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

rockchip_setup_macaddr() runs from an initcall, so returning an error
code will make that initcall fail thus breaking the boot process.

And if an ethernet address is already set this is definitly not a
cause for that, so just return success in that case.

Fixes: 04825384 ("rockchip: rk3399: derive ethaddr from cpuid");
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.

Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).

Future users should also note that the pinmux default in the dts is to use
the M1 pins while the Kconfig option takes M0 as a default.
Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.
Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>

PX5 evb has no ETH port, so disable it.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

And show my best respect to Heiko's work for this solution.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

After commit d8765e24 ("Enable building of u-boot.itb
on Rockchip platform"), u-boot.itb will automatically
generated by "make all" command, manually command
"make u-boot.itb" is no longer needed.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

SPL has limited available resources, and the performance between
ARM and Thumb isn't that significant.

This patch builds using Thumb instruction set to reduce the code
size by nearly 6K.

Original:
   text	   data	    bss	    dec	    hex	filename
  26526	   4004	   1376	  31906	   7ca2	spl/u-boot-spl

Thumb:

   text	   data	    bss	    dec	    hex	filename
  20232	   4004	   1376	  25612	   640c	spl/u-boot-spl
Signed-off-by: NAdam Ford <aford173@gmail.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Signed-off-by: NThomas Hebb <tommyhebb@gmail.com>

The da850-evm doesn't have the boot pins configured in a way
to make MMC/SD booting an option, and MMC/SD support is not
enabled in SPL.  Therefore, there is no need to support raw mode
mmc/sd support in SPL.

This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Signed-off-by: NAdam Ford <aford173@gmail.com>

At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

# This is actually a resent patch of
# [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html

Two test cases are added under test_fs_ext:
    test case 10: for root directory
    test case 11: for non-root directory

Those will verify a behavior fixed by the commits related to
root directory
("fs: fat: allocate a new cluster for root directory of fat32" and
"fs: fat: flush a directory cluster properly"), and focus on
handling long-file-name directory entries under a directory.
Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>

Unlink test for FAT file system seems to fail at test_unlink2.
(When I added this test, I haven't seen any errors though.)
for example,
===8<===
fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img']

    def test_unlink2(self, u_boot_console, fs_obj_unlink):
        """
        Test Case 2 - delete many files
        """
        fs_type,fs_img = fs_obj_unlink
        with u_boot_console.log.section('Test Case 2 - unlink (many)'):
            output = u_boot_console.run_command('host bind 0 %s' % fs_img)

            for i in range(0, 20):
                output = u_boot_console.run_command_list([
                    '%srm host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i),
                    '%sls host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i)])
                assert('' == ''.join(output))

            output = u_boot_console.run_command(
                '%sls host 0:0 dir2' % fs_type)
>           assert('0 file(s), 2 dir(s)' in output)
E           AssertionError: assert '0 file(s), 2 dir(s)' in '            ./\r\r\n            ../\r\r\n        0   0123456789abcdef11\r\r\n\r\r\n1 file(s), 2 dir(s)'

test/py/tests/test_fs/test_unlink.py:52: AssertionError
===>8===

This can happen when fat_itr_next() wrongly detects an already-
deleted directory entry.

File deletion, which was added in the commit f8240ce9 ("fs: fat:
support unlink"), is implemented by marking its entry for a short name
with DELETED_FLAG, but related entry slots for a long file name are kept
unmodified. (So entries will never be actually deleted from media.)

To handle this case correctly, an additional check for a directory slot
will be needed in fat_itr_next().

In addition, I added extra comments about long file name and short file
name format in FAT file system. Although they are not directly related
to the issue, I hope it will be helpful for better understandings
in general.
Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>

The mmc CID value is one of the input parameters used to provision the
RPMB key. The trusted execution environment expects this value to be
specified in big endian format.

Before this fix, on little endian systems, the value returned by the
linux kernel mmc driver differed from the one returned by u-boot.
This meant that if linux provisioned the RPMB key, u-boot would not
have access to the partition (and the other way around).
Signed-off-by: NJorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: NJens Wiklander <jens.wiklander@linaro.org>

The command cp fails on sandbox because the address is used
directly. To fix this issue, we call the function map_sysmem
to translate the address.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

The command iminfo fails on sandbox because the address
is used directly. To fix this issue, we call the function
map_sysmem to translate the address.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.
Signed-off-by: NLukasz Majewski <lukma@denx.de>

PCI devices may be disabled in the device tree. Devices which are probed
by the device tree handle the "status" property and are skipped if
disabled. Devices which are probed by the PCI enumeration don't check
that property. Fix it.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NAlex Marginean <alexandru.marginean@nxp.com>
Tested-by: NAlex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

- Convert some R-Car Gen3 platforms to DM_SPI{,_FLASH}

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>