- 15 12月, 2015 2 次提交
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由 Tom Rini 提交于
Since the changes in a1e56cf6 the way that we had board_mmc_init() structured for OMAP parts (so that we always report device 0) are no longer functional. For now, make the case of booting from the second device initialize both devices (we have no devices that only have the second device as MMC). A further rework and consolidation of the functions should be done at a later date. Tested on Beaglebone Black (SD and eMMC boot). Reported-by: NVagrant Cascadian <vagrant@debian.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Eric Nelson 提交于
In order to support boot from multiple devices through board_boot_order, it's necessary to use the block number of a device. The use of a hard-coded 0 for the device number also creates a need to re-order block devices for use in SPL like this: http://git.denx.de/?p=u-boot.git;a=blob;f=board/freescale/mx6slevk/mx6slevk.c;hb=HEAD#l195Signed-off-by: NEric Nelson <eric@nelint.com>
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- 14 12月, 2015 3 次提交
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由 Stephen Warren 提交于
Unfortunately U-Boot assumes that almost all numbers are in hex, including partition numbers passed to e.g. "load". So, the command "part list mmc 0 -bootable devplist" should use hex when writing partition numbers into $devplist, so they'll be correctly interpreted. Change-Id: I9a70b19749643876baadb45efbc3decaef8bfee2 Fixes: 0798d6fd ("part: Add support for list filtering on bootable partitions") Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
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由 Peter Robinson 提交于
With gcc 5.2 and later we get a bunch of "error: unknown type name" for 'uint8_t', 'uint32_t' and friends. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
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由 angelo@sysam.it 提交于
Add private libgcc Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
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- 13 12月, 2015 5 次提交
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由 Nishanth Menon 提交于
Correct the spelling for character.. Signed-off-by: NNishanth Menon <nm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Egli, Samuel 提交于
Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de>
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由 Egli, Samuel 提交于
This patch fixes the DDR3 initialization procedure in order to comply with DDR3 standard. A 500 us delay is specified between the DDR3 reset and clock enable signal. Until now, this delay was not respected. Some DDR3 chips don't bother but the bigger the RAM becomes the more likely it seems that this delay is needed. We observed that DRAM > 256 MB from the manufacturer Samsung have an issue when the specification is not respected. Changes: 1) Add a 1 ms wait for L3 timeout error trigger 2) Don't delay DDR3 initialization Bit 31 of emif_sdram_ref_ctrl shouldn't be set because his suppresses the initialization of DDR3 Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Reviewed-by: NJames Doublesin <doublesin@ti.com> Cc: Tom Rini <trini@konsulko.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de>
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由 Miao Yan 提交于
VxWorks 7 kernels retrieve 'local-mac-addr' from dtb and use that for NIC MAC address. As a result, when booting the same kernel image on multiple boards, there will be address conflicts. So fixup MAC address when booting VxWorks 7 kernels Signed-off-by: NMiao Yan <yanmiaobest@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Kamil Lulko 提交于
Signed-off-by: NKamil Lulko <kamil.lulko@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 12月, 2015 22 次提交
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由 Michal Simek 提交于
Add xlnx,xps-spi-2.00.a/b which is compatible string listed in the Linux kernel. Remove origin one which has no real background. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Used quite different name's and e-mail address, all of them mapped to standard name and e-mail address. Cc: Tom Rini <trini@konsulko.com> Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Since all spi-flash core operations are moved into sf_ops.c then it's better to renamed as spi-flash.c Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Used static for file-scope functions in sf_probe.c Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Since spi_slave is a spi pointer in spi_flash{} then assign spi_slave{} pointer to flash->spi and remove spi_slave pointer argument to - spi_flash_probe_slave - spi_flash_scan Tested-by: NJagan Teki <jteki@openedev.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
For assigning read_bar commands in spansion case, break is missing this patch add that break. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
SST parts added on sf_params.c supports both SST_WR which consits of both BP and WP and there is a spi controller ich which supports only BP so the relevent _write hook set based on "slave->op_mode_tx" hence there is no respective change required from flash side hance removed these. Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Removed unneeded header includes in sf_ops and sf_probe Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Using macro's for flash power up read-only access code leads wrong behaviour hence use idcode0 for runtime detection, hence the flash which require this functionality gets detected at runtime. Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Most of the register access function are static, so used simple name to represent each. Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
This patch removes unneeded ifdef and fixed accordingly. Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Use static for file-scope functions and removed them from header files. Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
- Move bar read code below the bar write hance both at once place, hence it easy for #ifdef macro only once and readable. - Move read_cmd_array at top Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
read_id code is related to spi_flash stuff hence moved to sf_ops. Tested-by: NJagan Teki <jteki@openedev.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Intension is that sf_ops should deals all spi_flash related stuff and sf_probe (which should renamed future) should be an interface layer for spi_flash versus spi drivers. sf_ops => spi_flash interface sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers Tested-by: NJagan Teki <jteki@openedev.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Rename spi_flash_validate_params to spi_flash_scan as this code not only deals with params setup but also configure all spi_flash attributes. And also moved all flash related code into spi_flash_scan for future functionality addition. Tested-by: NJagan Teki <jteki@openedev.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Michal Simek 提交于
ZynqMP is using different symbol. Use correct one. Reviewed-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Extend compatible list table for cdns,spi-r1p6 compatible string. Reviewed-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Peng Fan 提交于
Support qspi flashes for mx7dsabresd 1. introduce pin mux settings 2. enable qspi clock 3. introduce related macro definitions Default QSPI is not enabled, since we need hardware rework to use QSPI, see SPF-28590, page 9: " QSPI signals are muxed with EPDC_D[7:0] When using QSPI: de-populate R388-R391, R396-R399 populate R392-R395, R299, R300 " After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi flashes can be deteced and read/erase/write. Log info: " => sf probe SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB => sf read 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Read: OK => sf erase 0 0x4000000 SF: 67108864 bytes @ 0x0 Erased: OK => sf write 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Written: OK " Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Reviewed-by: NStefano Babic <sbabic@denx.de> Reviewed-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
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由 Jagan Teki 提交于
SPI_3WIRE is spi mode not spi flags, so this patch fixed the spi-3wire checking throgh mode instead of flags. Cc: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
spi-3wire is used when SI/SO signals shared so get the same from dts node and assign to mode on slave plat->mode. Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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- 11 12月, 2015 7 次提交
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由 Michal Simek 提交于
Use tabs instead of space for indentation. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
Fix typo in command description. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Stefan Roese 提交于
Fix incorrect comment alignments. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Stefan Roese 提交于
Add a remark about SPL to this Kconfig option. Otherwise its identitcal to the non-SPL version, which is confusing. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: NSimon Glass <sjg@chromium.org> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Thomas Chou 提交于
Add links for toolchains not available on kernel.org. The sh4 toolchains from kernel.org dose not work for some boards, so use the sh from Sourcery. Signed-off-by: NThomas Chou <thomas@wytron.com.tw> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 10 12月, 2015 1 次提交
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由 Jens Kuske 提交于
The read delays were set incorrectly, leading to reliability issues at higher DRAM clock speeds. This commit adjusts this to match the vendor boot0 behaviour. Signed-off-by: NJens Kuske <jenskuske@gmail.com> Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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