- 27 5月, 2014 13 次提交
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由 Wu, Josh 提交于
The at91x40.h is not exist. So we remove it. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
For sama5d3xek we need to modify the SPL image for correct detection by ROM code. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
The new atmelimage converts a machine code BLOB to bootable ROM image. Atmel ROM has no sophisticated image format, it only checks the first 7 ARM vectors. The vectors can contain valid B or LDR opcodes, the 6'th vector contains the image size to load. Additionally the PMECC header can be written by the atmelimage target. The parameters must be given via the -n switch as a coma separated list. For example: mkimage -T atmelimage \ -n usePmecc=1,sectorPerPage=4,sectorSize=512,spareSize=64,eccBits=4,eccOffset=36 \ -d spl/u-boot-spl.bin boot.bin A provided image can be checked for correct header setup. It prints out the PMECC header parameters if it has one and the 6'th interrupt vector content. ---8<--- Image Type: ATMEL ROM-Boot Image with PMECC Header PMECC header ==================== eccOffset: 36 sectorSize: 512 eccBitReq: 4 spareSize: 64 nbSectorPerPage: 4 usePmecc: 1 ==================== 6'th vector has 17044 set --->8--- A SPL binary modified with the atmelimage mkimage target was succesfully booted on a sama5d34ek via MMC and NAND. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Heiko Schocher <hs@denx.de> Tested-by: NBo Shen <voice.shen@atmel.com>
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Heiko Schocher <hs@denx.de>
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由 Wu, Josh 提交于
Signed-off-by: NJosh Wu <josh.wu@atmel.com> [fix checkpatch line length warning] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
We need check the NULL pointer as at91_pio_get_port() may return NULL. Also print a error message when at91_pio_get_port() failed otherwise we cannot notice the failure. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
It supports boot from NAND and SD/MMC card. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
If without switch to main crystal oscillator, the sama5d3 SoC will use internal on chip RC oscillator. In order to get better accuracy, switch to main crystal oscillator. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 25 5月, 2014 18 次提交
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由 Ian Campbell 提交于
The correct value for this setting can vary across SoCs and boards, so make it configurable. Also reduce the default value to 8, which is the same default as used in the Linux driver. Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com>
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由 Ian Campbell 提交于
On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote: > The {r,t}xbuffs fields also need to be aligned. Previously this was done > implicitly because they immediately followed the descriptor tables. Make this > explicit and also move to the head of the struct. Looks like I managed to not actually commit the move of the field to the head of the struct! v3.1 follows.... Ian. 8<------------ >From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Thu, 1 May 2014 19:45:15 +0100 Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more efficiently. The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could be 256 or even larger. That means there is a potentially huge hole in the struct before those fields, so move them to the front where they are better packed. Moving them to the front also helps ensure that so long as dw_eth_dev is properly aligned (which it is since "net/designware: ensure device private data is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids having to worry too much about compiler specifics. The {r,t}xbuffs fields also need to be aligned. Previously this was done implicitly because they immediately followed the descriptor tables. Make this explicit and also move to the head of the struct. Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com> Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
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由 Ian Campbell 提交于
This is required at least on ARM. When sending instead of simply invalidating the entire descriptor, flush as little as possible while still respecting ARCH_DMA_MINALIGN, as requested by Alexey. Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com>
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由 Ian Campbell 提交于
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it is aligned to a dma boundary. Without this I see: ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0 Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NAlexey Brodkin <abrodkin@synopsys.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Ian Campbell 提交于
Add support for booting from an MMC card. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NHenrik Nordström <henrik@henriknordstrom.net> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NMarek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: NLuke Leighton <lkcl@lkcl.net> Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NWills Wang <wills.wang.open@gmail.com> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NStefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i) processors. Enable for the Cubietruck. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NTom Rini <trini@ti.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Ian Campbell 提交于
This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: NAdam Sampson <ats@offog.org> Signed-off-by: NAleksei Mamlin <mamlinav@gmail.com> Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NLuc Verhaegen <libv@skynet.be> Signed-off-by: NLuke Leighton <lkcl@lkcl.net> Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NPatrick Wood <patrickhwood@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NWills Wang <wills.wang.open@gmail.com> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NMarek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
This patch adds DRAM initialisation support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NLuke Leighton <lkcl@lkcl.net> Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NMarek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMa Haijun <mahaijuns@gmail.com> Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NHenrik Nordström <henrik@henriknordstrom.net> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Reviewed-by: NTom Rini <trini@ti.com> Acked-by: NMarek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Ian Campbell 提交于
This patch adds the basic clocks and timer support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Some of the code here is common to multiple sunxi subarchtectures, hence files are named sun4i which is the earliest similar variant. Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NLuke Leighton <lkcl@lkcl.net> Signed-off-by: NOliver Schinagl <oliver@schinagl.nl> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Rob Herring 提交于
My Calxeda email is gone, so update my email address. Signed-off-by: NRob Herring <robh@kernel.org>
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由 Stefan Agner 提交于
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM issues with newer silicon (1.1). This register was added in revision 4 of the Vybrid Reference Manual. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 David Feng 提交于
Signed-off-by: NDavid Feng <fenghua@phytium.com.cn>
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由 Rob Herring 提交于
Enable CONFIG_SYS_GENERIC_BOARD on highbank. Signed-off-by: NRob Herring <robh@kernel.org>
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由 Michael Walle 提交于
Move addresses for kernel, ramdisk and fdt blob to own variables. Add dtb blob loading to all existing boot scripts, dtb filenames were taken from vanilla kernel. Introduce new boot script bootcmd_legacy, which only loads a kernel and a ramdisk. Make this the default boot script. This should also restore the behaviour of the original bootloader. Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: NMichael Walle <michael@walle.cc>
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由 Michael Walle 提交于
Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: NMichael Walle <michael@walle.cc>
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- 24 5月, 2014 9 次提交
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由 Albert ARIBAUD 提交于
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由 Ilya Ledvich 提交于
Make the common eeprom library available for any I2C driver. Signed-off-by: NIlya Ledvich <ilya@compulab.co.il> Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Dmitry Lifshitz 提交于
Add environment partition runtime detection callback. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Dmitry Lifshitz 提交于
cm-t54 Eth MAC address is stored in onboard EEPROM. Add EEPROM support and setup stored Eth MAC address. If EEPROM does not contain a valid MAC, then generate it from the processor ID code (reference code is taken from OMAP5 uEvm board file). Modify Device Tree blob MAC address field with retrieved data. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Dmitry Lifshitz 提交于
Add cm-t54 board directory, config file. Enable build. Basic support includes: Serial console SD/MMC eMMC USB Ethernet Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Sergey Alyoshin 提交于
As revision code 1 is for silicon revision 2.0, it is easily confused with silicon revision 1.0. Device type report also reworked in same style. Signed-off-by: NSergey Alyoshin <alyoshin.s@gmail.com>
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由 Lokesh Vutla 提交于
Last section of DMM is used for trapping tiler unmapped sections. Corresponding trap_size should be deducted from total SDRAM size only if trap section is overlapping with available SDRAM based on DMM sections. Fixing the same. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Tested-by: NSamuel Egli <samuel.egli@siemens.com>
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