- 04 5月, 2015 22 次提交
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由 Hans de Goede 提交于
Move the axp-gpio code out of the drivers/power/axp*.c code, and into a new separate axpi-gpio driver. This change drops supports for the gpio3 pin on the axp209, as that requires special handling, and no boards are using it. Besides cleaning things up by moving the code to a separate driver, as a bonus this change also adds support for the (non vusb) gpio pins on the axp221 and the gpio pins on the axp152. The new axp-gpio driver gets its own Kconfig option, and is only enabled on boards which need it. Besides that it only gets enabled in the regular u-boot build and not for the SPL as we never need it in the SPL. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add support for the axp152 and axp209 PMICs to the pmic register access helpers. This is a preparation patch for moving the axp gpio code to a separate gpio driver. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Move the register helpers used to access the registers via p2wi resp. rsb bus on the otherwise identical axp221 and axp223 pmics to a separate file, so that they can be used by the upcoming standalone axp gpio driver too. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Change the axp_gpio_foo function prototypes to match the gpio uclass op prototypes, this is a preparation patch for moving the axp gpio code to a separate driver-model gpio driver. Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c this adds are removed in a later patch. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank (for now) for the mmc pinmux code in board/sunxi/board.c, so build it for driver-model enabled builds too. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
We want to use driver-model/fdt with other model SoCs too, so add compatible strings for the other SoCs to the dm sunxi gpio code. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Simon Glass 提交于
Until sunxi moves to device tree (e.g. for USB) we need to convert named GPIOs to numbers. Add a function to do this. This fixes the USB / EHCI support not working on the LinkSprite pcDuino3 (which uses devicemodel). Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Simon Glass 提交于
By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change the driver model GPIO driver for sunxi to use these names. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Hans de Goede 提交于
i2c_init_board() gets called before the driver-model (gpio) code is initialized, so move the setup of the soft-i2c pins out of i2c_init_board() and into board_init(), at which time the driver-model setup has been done. Also add proper error checking and properly request the gpios as that is mandatory with the driver-model. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The driver-model gpio functions may return another value then -1 as error, make the sunxi display code properly handle this. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The driver-model gpio functions may return another value then -1 as error, make the sunxi usbc properly handle this. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
This fixes the following errors being printed during boot: Error, wrong i2c adapter 0 max 0 possible Error, wrong i2c adapter 0 max 0 possible Signed-off-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb, with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Vishnu Patekar 提交于
The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen, 512M RAM, 8G ROM and integrated sdio wifi. Also see: http://linux-sunxi.org/Softwinner_astar-rdaSigned-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Vishnu Patekar 提交于
Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Vishnu Patekar 提交于
Based on Allwinner dram init code from the a33 bsp: https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by Hans de Goede. Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add support for the new second DRAM PLL found on the A33 SoC. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
This is a preparation patch for adding A33 support, which will have a mach name of sun8i-a33. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
We do not use irqs in u-boot so remove the unused irq field, and all the #ifdef-ery around the irq initialization. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
There is no reason not to and this make the #ifdef-ery easier to read. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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- 02 5月, 2015 1 次提交
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由 Jan Kiszka 提交于
This is already invoked a few cycles later in monitor mode by _secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers _secure_monitor via smc #0). Drop it here, it serves no purpose. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NThierry Reding <treding@nvidia.com> Tested-by: NThierry Reding <treding@nvidia.com> Tested-by: NIan Campbell <ijc@hellion.org.uk> Tested-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 29 4月, 2015 17 次提交
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Masahiro Yamada 提交于
Move arch/arm/include/asm/arch-zynq/* -> arch/arm/mach-zynq/include/mach/* Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Masahiro Yamada 提交于
Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/* Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Masahiro Yamada 提交于
The comment line in arch/arm/cpu/armv7/zynq/config.mk says that the option "-mfpu=neon" is necessary for compiling lowlevel_init.S. We do not have to give it to all the source files. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Enable SDHCI0 for zynqmp. Add empty gpio.h because of sdhci requirement. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Provide an option to write filesystem independend commands. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Enable the i2c driver for ZynqMP Also enable the eeprom for read and writes to eeprom on ZynqMP ZynqMP uses the same i2c controller as in Zynq Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add support for EMMC bootmode. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add support for Veloce - zynqmp emulation platform. Platform doesn't support SDHCI. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Fix wrong timer calculation in get_timer_masked incase of overflow. This fixes the issue of getting wrong time from get_timer() calls. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Remove the quirk SDHCI_QUIRK_NO_CD as it is not required. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add support for loading sw for R5 with enabling for zynqmp. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
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Define the mmu table till 2MB granularity enable dcaches for zynqmp. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Disable all level shifters before enabling the PS-to-PL level shifters as it would be good to disable all level shifters before enabling the PS-to-PL in order to ensure that it is in proper state Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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