- 08 10月, 2019 40 次提交
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由 Peng Fan 提交于
Import i.MX8MM dtsi from Linux Kernel, commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Because we need to get cpu freq in print_cpuinfo at very early stage, so we need to make sure the ccm be probed. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port. To directly return devno, we could avoid add board specific code. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Introduce clk implementation for i.MX8MM, including pll configuration, ccm configuration. Mostly will be done clk dm driver, but such as DRAM part, we still use non clk dm driver, because we have limited sram. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
i.MX8MQ and i.MX8MM use different analog pll design, but they share same ccm design. Add clock_imx8mq.h for i.MX8MQ keep common part in clock.h Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
i.MX8MQ and i.MX8MM has totally different pll design, so rename clock to clock_imx8mq. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Make reset_cpu only visible when CONFIG_SYSRESET not defined or CONFIG_SPL_BUILD. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
To i.MX8MM SCTR clock is disabled by ROM, so before timer init need to enable it. To i.MX8MQ, it does not hurt the clock is enabled again. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Ye Li 提交于
Set trustzone region 0 to allow both non-secure and secure access when trust zone is enabled. We found USB controller fails to access DDR if the default region 0 is secure access only. Signed-off-by: NYe Li <ye.li@nxp.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE memory from its settings. So ARM speculative prefetch in u-boot may access that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory is set to secure access, then the speculative prefetch will fail and cause various memory issue in u-boot. The fail address register and int_status register in trustzone has logged that speculative access from u-boot. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
i.MX8MM does not have LVTTL, it has a PE property Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Add pin header file for i.MX8MM To IMX8MM_PAD_NAND_WE_B_USDHC3_CLK, IOMUX_CONFIG_SION needs to be selected. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
There are several variants based on i.MX8MM, add the support in get_cpu_rev Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
i.MX8MM has similar architecture with i.MX8MQ, but it has totally different PLL design and register layout change. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Drop unused register definitions and structures for i.MX8MQ Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Differnet board has different controller used, it is hard to use one layout for them all. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Add i.MX8MM cpu type and related helper functions Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Import clock bindings header file from Linux 5.3.0-rc2 Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Add IMX8MM kconfig entry Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
Add IMX8MQ kconfig entry, preparing support IMX8MM Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then we could not reuse imximage.cfg, so create a new one. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to end of the u-boot-spl-nodtb.bin, however we also put the ddr firmware file to this location, so need to adapt the code with SPL OF and align to 4 bytes to ease copy firmware. Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Tested-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a 4-byte-aligned address to load the firmware. In cases where OF is enabled in SPL the dtb will be appended to the SPL binary and can result in a binary that is not aligned correctly. If OF is not enabled in SPL, `_end` is already aligned correctly, but this patch does not hurt. To ensure the correct alignment we use dd to create a temporary file u-boot-spl-pad.bin with the correct padding. Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Tested-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Frieder Schrempf 提交于
Fix the FIT image metadata for i.MX8 to result in the intended boot order (SPL -> ATF -> U-Boot). Signed-off-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Stefan Roese 提交于
Use BUILD_TARGET to automatically build "u-boot-with-spl.imx" on MX6 targets with SPL. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Stefan Roese 提交于
Similar to "spl_sd.cfg", this patch introduces "spl_qspi.cfg" so that all i.MX6 based boards can use it, when they use SPL and QSPI boot mode. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Stefan Roese 提交于
This patch adds the missing boot mode detection for QSPI boot on i.MX6UL/ULL. Without it, booting with SPL from QSPI NOR does not work. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Anatolij Gustschin 提交于
Since recent splash changes common code for splashscreen logo should be used instead of adding duplicated code under board directories. mx6ul_9x9_evk and mx6ul_14x14_evk configurations used old board specific logo code and do not link, fix them. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Acked-by: NPeng Fan <peng.fan@nxp.com>
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由 Breno Matheus Lima 提交于
The default CSF_SIZE defined in Kconfig is too high and SPL cannot fit into the OCRAM in certain cases. The CSF cannot achieve 0x2000 length when using RSA 4K key which is the largest key size supported by HABv4. According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices" it's recommended to pad CSF binary to 0x2000 and append DEK blob to deploy encrypted boot images. As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060 which should cover both CSF and DEK blob length. Update default_image.c and image.c to align with this change and avoid a U-Boot proper authentication failure in HAB closed devices: Authenticate image from DDR location 0x877fffc0... bad magic magic=0x32 length=0x6131 version=0x38 bad length magic=0x32 length=0x6131 version=0x38 bad version magic=0x32 length=0x6131 version=0x38 spl: ERROR: image authentication fail Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets") Reported-by: NJagan Teki <jagan@amarulasolutions.com> Signed-off-by: NBreno Lima <breno.lima@nxp.com>
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由 Patrick Wildt 提交于
This patch makes sure that the reset controller driver is compiled for the i.MX8MQ EVK. Signed-off-by: NPatrick Wildt <patrick@blueri.se>
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由 Patrick Wildt 提交于
This patch adds the reset controller node to the i.MX8MQ SoC device tree. Signed-off-by: NPatrick Wildt <patrick@blueri.se>
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由 Patrick Wildt 提交于
Add support for the reset controller that's used on the i.MX7D and i.MX8MQ. This will be needed to be able to assert the PCIe reset pins. Bindings taken from Linux, driver implementation mostly taken from Linux and adjusted to U-Boot infrastructure. Signed-off-by: NPatrick Wildt <patrick@blueri.se> Reviewed-by: NFabio Estevam <festevam@gmail.com>
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由 Patrick Wildt 提交于
Add support for the power domain controller that's used on the i.MX8MQ. This will be needed to be able to power on the PCIe controller. Bindings taken from Linux, driver implementation taken from the i.MX8 power domain controller and adjusted for the i.MX8M SoC. Signed-off-by: NPatrick Wildt <patrick@blueri.se>
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由 Parthiban Nallathambi 提交于
pcl063 phycore SoM with eMMC also got usdhc reset pin, add reset pin to pinmux. Signed-off-by: NParthiban Nallathambi <pn@denx.de>
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由 Fabio Estevam 提交于
The Denx FTP location is no longer reachable. Switch to the Timesys repository instead. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
doc/README.mxs no longer exists. It has been renamed doc/imx/common/mxs.txt, so fix the mx28evk README accordingly. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Anatolij Gustschin 提交于
Remove CONFIG_DM_ETH conversion warning to avoid board removal. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Lukasz Majewski 提交于
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to read states of gpio pins (and for example alter the boot flow). It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match requirements for SPL_OF_PLATDATA usage. Signed-off-by: NLukasz Majewski <lukma@denx.de>
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由 Lukasz Majewski 提交于
This change replaces printf() with debug() for the notification about commands timeouts. This is done on purpose (also other drivers use such approach - dw_mmc.c, mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one is using sd card or eMMC device. In such situation timeout is a some kind of a "normal" behavior and there shall not be any output to the console. There is no impact on boot time for boards using this driver (even in SPL) when two extra timeouts are returned (no SD card present, only eMMC available). Boot time tested with grabserial: sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*" Signed-off-by: NLukasz Majewski <lukma@denx.de>
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