- 27 7月, 2020 11 次提交
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由 Michael Walle 提交于
Don't use LDR to load a pointer to a function. This will generate a literal which cannot be relocated. Use ADR which is PC-relative and therefore can easily be relocated. Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Michael Walle 提交于
Move it out of lowlevel.S into spintable.S. On layerscape, the secondary CPUs are brought up in main u-boot. This will make it possible to only compile the spin table code for the main u-boot and omit it in SPL. This saves about 720 bytes in the SPL. Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Michael Walle 提交于
The generic armv8 code already has support to bring up the secondary cores. Thus, don't hardcode the jump in the layerscape lowlevel_init to the spin table code; instead just return early and let the common armv8 code handle the jump. This way we can actually use the CPU_RELEASE_ADDR feature. Signed-off-by: NMichael Walle <michael@walle.cc> [Rebased, Removed kontron_sl28.h change as file does not exist] Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Michael Walle 提交于
Make the print of the starting address a debug output and pretty print the info about online cores. Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Michael Walle 提交于
Spin tables are broken with bootefi. This is because - in contrast to the booti call chain - there is no call to smp_kick_all_cpus(). Due to this missing call the secondary CPUs are never released from their "wait for interrupt state", see secondary_boot_func() in lowlevel.S. Originally, this "wait for interrupt" is there to make sure, the spin table is cleared before the secondary cores read it for the first time. But the boot flow for the layerscape architecture is different from that. The CPUs are release from their BootROM _after_ U-Boot's spin-table is cleared, see fsl_layerscape_wake_seconday_cores() in mp.c. Thus, there is no need to wait for this interrupt and no need for kicking all cores on cpu_release. An atomic 64bit write to the spin-table and a "sev" is sufficient. Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Kuldeep Singh 提交于
Current PFE firmware access spi-nor memory directly. New spi-mem framework does not support direct memory access. So, let's use spi_flash_read API to access memory instead of directly using it. Signed-off-by: NKuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 hui.song 提交于
Enable the gpio feature on fsl-layerscape platform. Signed-off-by: Nhui.song <hui.song_1@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 hui.song 提交于
add one struct mpc8xxx_gpio_plat to enable gpio feature. Signed-off-by: Nhui.song <hui.song_1@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Era Tiwari 提交于
LS1088A-RDB has MMC, SCSI, DHCP as boot targets, but the USB support was missing. Add support for USB as Boot_targets_devices. Signed-off-by: NEra Tiwari <era.tiwari@nxp.com> Signed-off-by: NPramod Kumar <pramod.kumar_1@nxp.com> [Rebased] Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Michael Walle 提交于
CONFIG_FSL_LAYERSCAPE is available in kconfig. There is no need to define it per board; the ls1028a_common.h is really board dependent and only fits to the NXP eval boards. Instead select CONFIG_FSL_LAYERSCAPE when ARCH_LS1028A is selected. Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Vladimir Oltean 提交于
Communication with some SPI slaves just won't cut it if these delays (before the beginning, and after the end of a transfer) are not added to the Chip Select signal. These are a straight copy from Linux: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt drivers/spi/spi-fsl-dspi.c Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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- 24 7月, 2020 22 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-riscv由 Tom Rini 提交于
- Fix SiFive HiFive Unleashed board booting failure problem. - Enable SiFive fu540 PWM driver. - Support SiFive fu540: SPI boot. - Update OpenSBI used for RISC-V CI testing. - Revert "riscv: Allow use of reset drivers". - Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"". - sysreset: syscon: - Don't assume default value for offset and mask property. - Support value property. - qemu: Add syscon reboot and poweroff support. - Fix SIFIVE debug serial dependency. - Fix linking error when building u-boot-spl with no SMP support. - AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg. - Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi - SiFive fu540 avoid using hardcoded ram base and size.
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git://git.denx.de/u-boot-dm由 Tom Rini 提交于
This reverts commit 5d3a21df, reversing changes made to 56d37f1c. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Bin Meng 提交于
At present the SiFive FU540 RAM driver uses hard-coded memory base address and size to initialize the DDR controller. This may not be true when this driver is used on another board based on FU540. Update the driver to read the memory information from DT and use that during the initialization. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NLeo Liang <ycliang@andestech.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Bin Meng 提交于
Make memory node available to SPL in prepration to updates to SiFive DDR RAM driver to read memory information from DT. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Rick Chen 提交于
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property instead of fdtdec_get_addr. This will increase the compatibility of dtb parsing. Signed-off-by: NRick Chen <rick@andestech.com> Acked-by: NLeo Liang <ycliang@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NLeo Liang <ycliang@andestech.com>
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由 Leo Yu-Chi Liang 提交于
Switch off SMP support when building u-boot-spl would cause linking error as follow: undefined reference to 'secondary hart relocate' and 'smp_call_function'. Add macro to wrap up proper code region that needs SMP configuration on. Signed-off by: Leo Liang <ycliang@andestech.com> Cc: rick@andestech.com Reviewed-by: NBin Meng <bin.meng@windriver.com>
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由 Michal Simek 提交于
The commit 4cc24aea ("serial: Add missing Kconfig dependencies for debug consoles") has added incorrect dependency for SIFIVE debug uart which should depend on SIFIVE driver instead of PL01x. Fixes: 4cc24aea ("serial: Add missing Kconfig dependencies for debug consoles") Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NLeo Liang <ycliang@andestech.com> Reviewed-by: NSean Anderson <seanga2@gmail.com>
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由 Bin Meng 提交于
This adds syscon reboot and poweroff support to QEMU RISC-V. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Bin Meng 提交于
Per the DT binding, <mask> and <value> property can have either one or both, and if <value> is missing, <mask> should be used, which is what current U-Boot sysreset_syscon driver supports. This adds support to the <value> property to the driver, and <mask> semantics is updated to really be a mask to the value if both exist. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Bin Meng 提交于
Per the DT binding, <offset> is a required property. Let's abort the probe if it is missing. For the <mask> property, current codes assume a default value of zero, which is not correct either. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Bin Meng 提交于
This reverts commit 23da3c68. Now the build failure of sifive_fu540_defconfig board has been fixed, revert this "revert patch". Signed-off-by: NBin Meng <bin.meng@windriver.com>
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由 Bin Meng 提交于
This reverts commit 958a3f46. A more appropriate change below is already in mainline. Commit fd31e4fd ("riscv: Do not build reset.c if SYSRESET is on") Revert this patch, so that U-Boot can be built successfully for SiFive Fu540 board. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NLeo Liang <ycliang@andestech.com>
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由 Bin Meng 提交于
Change to use OpenSBI release v0.8 generic platform images for QEMU RISC-V CI testing for azure, gitlab and travis-ci. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jagan Teki 提交于
Enable SPI flash(SF) distro boot command in Sifive FU540. This distro boot will read the boot script at specific location at the flash and start sourcing the same. Included the SF device at the last of the target devices list since all the rest of the devices on the list have more possibility to boot the distribution due to the size of the SPI flash is concern. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com>
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由 Jagan Teki 提交于
HiFive-Unleashed-A00 has SPI flash with 32MiB size. So, let's use the script offset at the end of 4K. This way it cannot overlap any offsets being used by software components in flash layout. So, SF distrocmd will pick the script at desired script address and run. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com>
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由 Jagan Teki 提交于
Mark the default U-Boot environment as SPI flash since this is an on board flash device. Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com> Tested-by: NBin Meng <bin.meng@windriver.com>
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由 Jagan Teki 提交于
SPI flash device on HiFive Unleashed has 32MiB Size. This patch adds SPI flash environment after U-Boot proper partition with a size of 128KiB. SPI flash partition layout(32MiB): 0 - 34 : reserved for GPT header 35 - 39 : unused 40 - 2087 : loader1 (SPL, FSBL) 2088 - 10279 : loader2 (U-Boot proper, U-Boot) 10280 - 10535 : environment 10536 - 65494 : rootfs 65528 - 65536 : distro script Note: the loader1 must start from 40th sector even though there are 6 free sectors prior since 40th sector is nearest flash sector boundary. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com> Tested-by: NBin Meng <bin.meng@windriver.com>
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由 Jagan Teki 提交于
Add booting from SPI for SiFive Unleashed board. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com> Tested-by: NBin Meng <bin.meng@windriver.com>
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由 Jagan Teki 提交于
Add support to detect boot mode at runtime for SiFive FU540 boards. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NBin Meng <bin.meng@windriver.com> Tested-by: NBin Meng <bin.meng@windriver.com>
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由 Pragnesh Patel 提交于
This patch enables SiFive PWM driver for the SiFive Unleashed board. Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NBin Meng <bin.meng@windriver.com>
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由 Bin Meng 提交于
Commit 40686c39 ("riscv: Clean up IPI initialization code") caused U-Boot failed to boot on SiFive HiFive Unleashed board. The codes inside arch_cpu_init_dm() may call U-Boot timer APIs before the call to riscv_init_ipi(). At that time the timer register base (e.g.: the SiFive CLINT device in this case) is unknown yet. It might be the name riscv_init_ipi() that misleads people to only consider it is related to IPI, but in fact the timer capability is provided by the same SiFive CLINT device that provides the IPI. Timer capability is needed for both UP and SMP. Considering that the original refactor does have benefits, that it makes the IPI code more similar to U-Boot initialization idioms. It also removes some quite ugly macros. Let's do the minimal revert instead of a complete revert, plus a fixes to arch_cpu_init_dm() to consider the SPL case. Fixes: 40686c39 ("riscv: Clean up IPI initialization code") Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NSean Anderson <seanga2@gmail.com> Tested-by: NLeo Liang <ycliang@andestech.com>
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git://git.denx.de/u-boot-dm由 Tom Rini 提交于
binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
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- 23 7月, 2020 1 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for efi-2020-10-rc1 (5) The series provides bug fixes for: * crash in OS when accessing UEFI variables * returning from UEFI fit images to U-Boot * error handling for variable services provided by OP-TEE * error handling in EFI_FILE_PROTOCOL.Read() * missing function documentation The first patches needed to use intermediate certificates for secure boot are added. (The rest of the series requires updating sbsigntool in our CI systems.) Logging is enabled in the bootefi command.
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- 22 7月, 2020 6 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- New rk3326 board: Hardkernel Odroid Go2; - Update board config and dts for RockPI 4/N8/N10; - Update led boot on support for roc-rk3399-pc; - Enable SPI Flash suppor for rk3328 rock64 board; - Update rockchip pcie phy to use generic framework;
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由 Jagan Teki 提交于
Disable ram rockchip debug driver for ROCKPi N8/N10 boards since we have verified ram in many instances with respective U-Boot versions. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able to boot from eMMC and SDMMC in order. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Enable PCI/NVME for M.2 Slot on RockPI-4 boards. => nvme info Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Suniel Mahesh 提交于
Enable common on board devices for ROCKPi N8. - USB 2.0 Host - USB 2.0 OTG/Gadget - HDMI Out Signed-off-by: NSuniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Suniel Mahesh 提交于
Add console settings like stdin, stdout and stderr as usbkbd and vidconsole respectively for evb-rk3288 targets. This would certainly help to detect the attached video devices (like HDMI) and print the console messages on display. Signed-off-by: NSuniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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