enable_spi_clock does the same thing with enable_cspi_clock, so
remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file
convert cm_fx6/spl.c to use enable_spi_clk
Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

According to README.mxc_ocotp the OCOTP is a stanard i.MX6 SoC feature
so centralise the config in mx6_common.h so functionality is standard
across all boards
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Remove the check for temperature being within the min/max range and enter the
busywait cooling loop whenever the CPU temperature is over the critical temp.
This fixes the issue where if a board was booted at a temp greater than
the CPU temperature max, it would skip the loop and never indicate or try
to address the overtemp issue.

Cc: Ye Li <b37916@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: NTim Harvey <tharvey@gateworks.com>

commit f566c994 "net: Update hardware MAC address if it changes in env"
removes writing MAC address to designware controller after soft reset.
This makes designware ethernet port fail to work. Actually the MAC
address should always be programmed after soft reset.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts has been merged into the upstream
Linux kernel as sun8i-a33-ippo-q8h-v1.2.dts, adjust u-boot to follow.

Note we've never shipped a final u-boot version with the old name, so this
is safe todo.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

we currently use in-development IODelay values for DRA72x which are
proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet
Phy over RGMII. The PHY characteristics and routing choices made on
the EVM, make the current iodelay values fail ethernet communication.

Instead, we need to choose custom values for DRA72x-evm specifically
designed for the PHY and routing on the platform for ethernet to
function.

Cc: Nishanth Menon <nm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>

Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>

We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

am43xx_evm_ethboot/usbhost_boot_defconfig entries are
missing in MAINTAINER file. Adding entries for them.
Reported-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

This removes the following two warnings from buildman:

	WARNING: no status info for 'cairo'
	WARNING: no maintainers for 'cairo'
Signed-off-by: NAlbert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>

Added UART DCC support for armv8
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The root cause of this problem should now be fixed.

This reverts commit a6a4c542.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NPavel Machek <pavel@denx.de>
Tested-by: NPavel Machek <pavel@denx.de>

When CONFIG_SYS_THUMB_BUILD is defined these functions may be called from
Thumb code. Add the required ENTRY and ENDPROC bracketing so that BLX is
used to call these ARM functions, instead of plain BL, which will fail.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reported-by: NPavel Machek <pavel@denx.de>

Fix big/small letters in comment.
Signed-off-by: NPavel Machek <pavel@denx.de>
Tested-by: NMarek Vasut <marex@denx.de>

The LPC32XX GPIO driver platdata currently contains GPIO state information,
which should go into priv_data. Thus rename lpc32xx_gpio_platdata to
lpc32xx_gpio_priv and convert to use dev_get_priv() instead.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Tested-by: NAlbert ARIBAUD <albert.aribaud@3adev.fr>

This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript', 'loadimage' and 'loadfdt' for mx53loco board.

This allows to use EXT partition instead of FAT, while keeping FAT compatibility.
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>

Cc: Jason Liu <r64343@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: NJason Liu <r64343@freescale.com>

Sinlinx SinA33 is a core/daughter board SDK kit from Sinlinx. It has
the A33 SoC, USB host, USB OTG, audio input/output, LCD, camera, SDIO
and GPIO headers.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Copy over all the latest dts changes from mripard/sunxi/dt-for-4.2.
This adds a dts file for Sinlinx SinA33 dev board, and the required
changes in the .dtsi files.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The A33 adds a pinmux function for UART0 in the PB pin group.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The original code was configuring the external pins after enabling
the R_PIO clock, which meant the configuration never made it to
the pin controller the first time in SPL.

Why this was working before is uncertain. Maybe the state was left
from a previous boot sequence, or RSB just happened to be the default
configuration. However with some A33 chips, SPL failed to configure
the PMIC. This was seen by me and Maxime on the Sinlinx SinA33 dev
board.

Reordering the calls fixed this.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Commit 487b3277 ("sunxi: GPIO pin mux hardware-feature-specific function
index defines") renamed all GPIO index defines, but missed the PORT F
UART0 setup functions.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Conflicts:
	configs/tbs2910_defconfig
	configs/tqma6q_mba6_mmc_defconfig
	configs/tqma6q_mba6_spi_defconfig
	configs/tqma6s_mba6_mmc_defconfig
	configs/tqma6s_mba6_spi_defconfig
	include/configs/mx6_common.h
Signed-off-by: NTom Rini <trini@konsulko.com>

Increase console IO buffer size to 1024 from the previous value of 256.
The previous value was too short for editing environment variables like
ubiboot from the console.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>

Fix compilation warnings for redefined 'clamp' macro and non-uniform
clamp macro types.
Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
Reviewed-by: NJagannadh Teki <jteki@openedev.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

Added SPI_FLASH_BAR entry on Kconfig with help description
Signed-off-by: NJagan Teki <jteki@openedev.com>

This commit moves:
- CONFIG_SPI_FLASH_BAR

from include/configs/*.h into configs/*_defconfigs
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

Added TEGRA20_SLINK entry on Kconfig with help description.
Signed-off-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>

Added TEGRA20_SFLASH entry on Kconfig with help description.
Signed-off-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>

Added TEGRA114_SPI entry on Kconfig with help description.
Signed-off-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>

Added ICH_SPI entry on Kconfig with help description.
Signed-off-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Added EXYNOS_SPI entry on Kconfig with help description.
Signed-off-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>