Add the secure boot defconfigs for QSPI boot on LS1088ARDB
and LS1088AQDS platforms.
Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: NVinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC
phase using esbc_validate command.

Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment

Add header address for PPA to be validated during ESBC phase for
LS1088A platform based on LAyerscape Chasis 3.

Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.
Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: NVinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Kernel is now located at 0x1000000 instead of 0xa00000
and envirorment variables are located at 3MB offset instead of
2MB in Flash.
Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This is suplement for patch which handle below errata:
A-009007, A-009008, A-008997, A-009798
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins

Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts
if QSPI is enabled and vice-versa
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.

Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
   dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
   New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
   dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
   APIs
Signed-off-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix
redefinition error. USE_BOOTCOMMAND was introduced in commit
b6251db8 ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND").
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

Move the warning to an error as we have been promising would happen in
this release.
Signed-off-by: NTom Rini <trini@konsulko.com>

Typo fix: CONIFG->CONFIG
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

In Linux, the warning messages are printed out by pr_warn().

We can use Linux-like log functions in tree-wide.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:1 zImage and run mmcbootz
[fallback 2] Check MMC 0:1 uImage and run mmcboot
[fallback 3] Check NAND partitions and run nandboot

If 'extlinux.conf' is not found on MMC 0, the previous boot behavior is
followed.
Signed-off-by: NDerald D. Woods <woods.technical@gmail.com>

To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

After relocation, when error happends, it is hard to track
ELR and LR with asm file objdumped from elf file.

So subtract the gd->reloc_off the reflect the compliation address.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.

But mainline U-Boot and Linux has the old address and size fixed.

These SoCs have a register interface to get the two firmware reserved
memory start and sizes.

This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.

Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].

[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html

Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()

Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception

Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h>
Signed-off-by: NTom Rini <trini@konsulko.com>

This adds platform code for the Khadas VIM board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.

The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

This adds platform code for the Libre Computer CC "Le Potato" board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.

The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Switch P212 Ethernet init to the common Ethernet init function.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Now, lib/libfdt/fdt_wip.c is the same as scripts/dtc/libfdt/fdt_wip.c

Change the former to a wrapper of the latter.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

All the other fdt_*_region() functions are located in fdt_region.c,
while only fdt_find_regions() was added to fdt_wip.c, strangely.

Move it to the suitable place.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

In the moment our exception entry code needs 34 instructions, so we
can't use put it directly into the table entry, which offers "only"
32 instructions there. Right now we just put an unconditional branch
there, then use a macro to place the 34 instructions *per entry* after
that. That effectivly doubles the size of our exception table, which
is quite a waste, given that we use it mostly for debugging purposes.

Since the register saving part is actually identical, let's just convert
that macro into a function, and "bl" into it directly from the exception
slot, of course after having saved at least the original LR.
This saves us about 950 bytes of code, which is quite a relief for some
tight SPLs, in particular the 64-bit Allwinner ones.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

Signed-off-by: NDmitry Korunov <dessel.k@gmail.com>

Adjust this test to use the unit test framework. Drop the two existing
commands for running the tests and replace them with a single
'ut compression' command, with sub-commands.
Signed-off-by: NSimon Glass <sjg@chromium.org>
[trini: Continue to have ret = run_test_internal(...) in run_test so ret
is always initialized]
Signed-off-by: NTom Rini <trini@konsulko.com>

Include necessary headers explicitly without relying on indirect
header inclusion.

<common.h>, <malloc.h> are unneeded.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The Linux derived log functions can be used anywhere and easily
turned on/off by CONFIG_LOGLEVEL.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is needed for ARCH_DMA_MINALIGN.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This header was renamed to rawnand.h in Linux.

The following is the corresponding commit in Linux.

  commit d4092d76a4a4e57b65910899948a83cc8646c5a5
  Author: Boris Brezillon <boris.brezillon@free-electrons.com>
  Date:   Fri Aug 4 17:29:10 2017 +0200

      mtd: nand: Rename nand.h into rawnand.h

      We are planning to share more code between different NAND based
      devices (SPI NAND, OneNAND and raw NANDs), but before doing that
      we need to move the existing include/linux/mtd/nand.h file into
      include/linux/mtd/rawnand.h so we can later create a nand.h header
      containing all common structure and function prototypes.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This driver is highly dependent on the configuration from denali_dt.c
Please enable CONFIG_NAND_DENALI_DT if you use this driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

denali_setup_data_interface() is always used.

I put __maybe_unused for a temporal use, then forgot to delete it.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Remove unnecessary DECLARE_GLOBAL_DATA_PTR and header includes.

<common.h> has been replaced with <linux/errno.h> and <linux/printk.h>.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Commit 72443c7f ("mtd: cfi: Add support for status register
polling") added a feature check to determine if status register
is available for certain flash chips. The "lower software bits"
register used to determine this feature is not backward compati-
ble. Older flash chips without this feature has reserved value
0xff. Instead of checking "lower software bits" register, use
CFI primary vendor-specific extended query. Since CFI version
1.4, software features can be read from offset 0x53 according to
document AN201168 from Cypress.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Tested-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NStefan Roese <sr@denx.de>

The u-boot.sym file is scanned to find unit test suites for execution. At
present it only finds those whose names start with 'dm' or 'env'. This
code is buried in the bowels of the test code so when adding a new suite
it is not easy to discover why it is ignored by the test framework.

There seems to be no need to make this restriction. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NStephen Warren <swarren@nvidia.com>

At present the test setup is somewhat mixed with the test itself. But if
the test setup fails (which it should not) then the test is actually
invalid. Put all the test buffers and sizes in a struct and separate out
the core code into a function.

This will make it easier to move the code to use the unit test framework.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Adjust the code to use the common test-execution function.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The logic to either iterate through a list of tests or pick a named test
is common to at lest two test suits. Move this logic into a new function
and call it from the environment tests.
Signed-off-by: NSimon Glass <sjg@chromium.org>