Add Pandora support.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: NDirk Behme <dirk.behme@googlemail.com>
Signed-off-by: NJason Kridner <jkridner@beagleboard.org>

Add EVM board support.
Signed-off-by: NManikandan Pillai <mani.pillai@ti.com>
Signed-off-by: NDirk Behme <dirk.behme@googlemail.com>
Signed-off-by: NJason Kridner <jkridner@beagleboard.org>

Add Overo board support.
Signed-off-by: NSteve Sakoman <sakoman@gmail.com>
Signed-off-by: NDirk Behme <dirk.behme@googlemail.com>
Signed-off-by: NJason Kridner <jkridner@beagleboard.org>

Add BeagleBoard support, common power code and README.
Signed-off-by: NJason Kridner <jkridner@beagleboard.org>
Signed-off-by: NDirk Behme <dirk.behme@googlemail.com>

The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.

This is the initial port, with basic infrastructure and
a working serial port.
Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Generic i386 reset - #define made redundant by weak function
Signed-off-by: NGraeme Russ <graeme.russ@gmail.com>

Signed-off-by: NGraeme Russ <graeme.russ@gmail.com>

This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: NHeiko Schocher <hs@denx.de>

Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Acked-by: NBen Warren <biggerbadderben@gmail.com>

This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.

- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: NHeiko Schocher <hs@denx.de>

We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The eLBC only handles 32-bit physical address in systems with 36-bit
physical.  The previos generation of LBC handled 34-bit physical
address in 36-bit systems.  Added a new CONFIG option to convey
the difference between the LBC and eLBC.

Also added defines for XAM bits used in LBC for the extended 34-bit
support.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Use the new BR_ADDR macro to properly setup the address field of the
localbus chipselects used by NAND.

This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs.  This is what we should have always been using from the start.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.

This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.

This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NAndy Fleming <afleming@freescale.com>

This patch will create a new board, SIMPC8313, from Sheldon Instruments.  This
board boots from NAND devices and is configureable for either large or small
page devices.  The board supports non-soldered DDR2, one ethernet port, a
Marvell 88E1118 PHY, and PCI host support.  The board also has a FPGA connected
to the eLBC providing glue logic to a TMS320C67xx DSP.
Signed-off-by: NRon Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Signed-off-by: NDave Liu <daveliu@freescale.com>

Signed-off-by: NMichal Simek <monstr@monstr.eu>

Signed-off-by: NMichal Simek <monstr@monstr.eu>

MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.

PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
support them.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

This patch adds esd's loadpci BSP command to CPCI4052 and
CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)

- Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately.  This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>

Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately.  This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

The values given for the PHY address were wrong, so the code
read no valid PHY ID, and fell through to the generic PHY
support, which would work on 1000M but would not auto negotiate
down to 100M or 10M.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

Lets make things a bit more user friendly.  It isn't 1985 anymore.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

These interfaces don't have usable connectors on the board, so don't
bother enumerating or configuring them.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

Initial support for Extreme Engineering Solutions XPedite5370 -
a MPC8572-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>