- 23 6月, 2011 1 次提交
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由 Michael Schwingen 提交于
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc. code and use u-boot's PCI infrastructure instead. Move board-specific PCI setup code (clock/reset) to board directory. Signed-off-by: NMichael Schwingen <michael@schwingen.org>
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- 23 1月, 2010 1 次提交
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由 Felix Radensky 提交于
The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: NFelix Radensky <felix@embedded-sol.com> Signed-off-by: NStefan Roese <sr@denx.de>
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- 13 8月, 2008 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 21 5月, 2008 1 次提交
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由 Wolfgang Denk 提交于
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 25 11月, 2007 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 12 7月, 2007 1 次提交
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由 Ed Swarthout 提交于
FSL PCIe block has extended cfg registers in the 100 and 400 range. For example, to read the LTSSM register: pci display <busn>.0 404 1 Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com>
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- 30 6月, 2006 1 次提交
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由 Marian Balakowicz 提交于
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- 13 1月, 2006 1 次提交
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由 Kumar Gala 提交于
We need to adjust the bus number we are trying to access based on which PCI controller its on Patch by Kumar Gala 12 Jan 2006
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- 25 9月, 2005 1 次提交
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由 Wolfgang Denk 提交于
Patch by Joe <lgxue@yahoo.com>, 13 Jan 2005
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- 08 8月, 2005 1 次提交
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由 Stefan Roese 提交于
Patch by Stefan Roese, 08 Aug 2005
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- 01 8月, 2005 1 次提交
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由 Stefan Roese 提交于
Patch by Steven Blakeslee, 27 Jul 2005
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- 12 1月, 2005 1 次提交
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由 wdenk 提交于
* Patch by Richard Woodruff, 10 Jan 2005: Update support for OMAP2420 (ARM11) and H4 board: o clean up and add new types to H4 memory probe code. o fix to work with internal boot. o added PRCM config III operation. o fix marginal flash timings. o add revison ATAG usage. o enable voltage scaling at power chip. o fix compile error for i2c. * Fix network problem (error when receiving multiple ARP packets)
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- 23 2月, 2004 1 次提交
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由 wdenk 提交于
o 440GX: - Fix PCI Indirect access for type 1 config cycles with ppc440. - Add phymode for 440 enet - fix pci pre init o XPedite1K: - Change board_pre_init to board_early_init_f - Add user flash to bus controller setup - Fix pci pre init - Fix is_pci_host to check GPIO for monarch bit - Force xpedite1k to pci conventional mode (via #define option) * Patch by Brad Kemp, 4 Feb 2004: - handle the machine check that is generated during the PCI scans on 82xx processors. - define the registers used in the IMMR by the PCI subsystem. * Patch by Pierre Aubert, 03 Feb 2004: cpu/mpc5xxx/start.S: copy MBAR into SPR311 * Patch by Jeff Angielski, 03 Feb 2004: Fix copy & paste error in cpu/mpc8260/pci.c * Patch by Reinhard Meyer, 24 Jan 2004: Fix typo in cpu/mpc5xxx/pci_mpc5200.c
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- 16 10月, 2003 1 次提交
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由 wdenk 提交于
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
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- 23 5月, 2003 1 次提交
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由 wdenk 提交于
Fix problem with only partially cleared .bss segment * Patch by Rune Torgersen, 12 May 2003: get PCI to work on a MPC8266ADS board; incorporate change to cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
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- 18 5月, 2003 1 次提交
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由 wdenk 提交于
(includes support for Intel 82365 and compatible PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers)
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- 26 3月, 2003 1 次提交
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由 wdenk 提交于
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- 22 11月, 2002 1 次提交
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由 wdenk 提交于
* Patch by Rod Boyce, 21 Nov 2002: fix PCMCIA on MBX8xx board * Patch by Pierre Aubert , 21 Nov 2002 Add CFG_CPM_POST_WORD_ADDR to make the offset of the bootmode word in DPRAM configurable
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- 17 8月, 2002 1 次提交
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由 wdenk 提交于
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