1. 25 3月, 2008 5 次提交
    • S
      [MIPS] asm headers' updates · 282223a6
      Shinya Kuribayashi 提交于
      Make some asm headers adjusted to the latest Linux kernel.
      Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
      282223a6
    • S
      [MIPS] Request for the 'mips_cache_lock()' removal · e1390801
      Shinya Kuribayashi 提交于
      The initial intension of having mips_cache_lock() was to use the cache
      as memory for temporary stack use so that a C environment can be set up
      as early as possible.
      
      But now mips_cache_lock() follow lowlevel_init(). We've already have the
      real memory initilaized at this point, therefore we could/should use it.
      No reason to lock at all.
      
      Other problems:
      
      Cache locking is not consistent across MIPS implementaions. Some imple-
      mentations don't support locking at all. The style of locking varies -
      some support per line locking, others per way, etc. Some parts use bits
      in status registers instead of cache ops. Current mips_cache_lock() is
      not necessarily general-purpose.
      
      And this is worthy of special mention; once U-Boot/MIPS locks the lines,
      they are never get unlocked, so the code relies on whatever gets loaded
      after U-Boot to re-initialize the cache and clear the locks. We're sup-
      posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
      but leave the situation as it is for a long time.
      
      For these reasons, I proposed the removal of mips_cache_lock() from the
      global start-up code.
      
      This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
      *things have changed*. If he wants the same behavior as before, he needs
      to have CFG_INIT_RAM_LOCK_MIPS in his config file.
      
      If we don't have any regression report through several releases, then
      we'll remove codes entirely.
      Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
      Acked-by: NAndrew Dyer <amdyer@gmail.com>
      e1390801
    • Y
      lwmon5 SYSMON POST: fix backlight control · 0d48926c
      Yuri Tikhonov 提交于
      If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
      run on the board, then the SYSMON POST controls the display backlight
      (doesn't switch backlight ON if POST FAILED, and does switch the
      backlight ON if PASSED).
      
      If not, then the video driver controls the display backlight (just
      switch ON the backlight upon initialization).
      Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
      0d48926c
    • Y
      lwmon5 SYSMON POST: fix handling of negative temperatures · ff2bdfb2
      Yuri Tikhonov 提交于
      Fix errors in the LWMON5 Sysmon POST for negative temperatures.
      Signed-off-by: NYuri Tikhonov <yur@emcraft.com>
      ff2bdfb2
    • W
      b38d7fc2
  2. 23 3月, 2008 6 次提交
  3. 21 3月, 2008 3 次提交
  4. 19 3月, 2008 20 次提交
  5. 16 3月, 2008 6 次提交