- 27 7月, 2017 34 次提交
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由 Kever Yang 提交于
A few lines (defines and declarations) had been duplicated when the puma-rk3399 board was initially merged. This removes the duplicates and changes the style to use local constants instead of pasted literals. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> [fixed up commit-message & converted to use 'const u32':] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
Add this dts to enable debug uart releated devices before relocation. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
printf will increase the code size more than 1kb, but platform like rk3036 has no enough space for it. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
function board_init_f_init_reserve will call memset, which is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT in spl stage. To reduce the code size, also enable SPL_TINY_MEMSET. As rk3036 will return to bootrom immediately after dram initialization, there is no need to run DM, so disable SPL_DM_SERIAL. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
RK3036 has no enough sapce use ARCH_MEMCPY/MEMSET in spl stage Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
RK3036 only has 4kb sram, the spl code will use 3.4 ~ 3.5 kb, the last 0.5kb are used for SP and GD, so there is no space for malloc. Also, the spl will directly return to bootrom after dram initialized, they never need the space for malloc. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
SPL and normal u-boot stage use different malloc pool size configuration before relocation, so use CONFIG_VAL(SYS_MALLOC_F_LEN) to fit different boot stage. Signed-off-by: NAndy Yan <andyshrk@gmail.com> Changes in v3: - use CONFIG_VAL(), which suggested by Simon Changes in v2: None arch/sandbox/cpu/start.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Acked-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Andy Yan 提交于
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Leo Wen 提交于
Add "preboot=usb start" to ROCKCHIP_DEVICE_SETTINGS,you don't need to input "usb start" in command line of u-boot console,it can auto-start the USB device,after that usb keyboard can work. Signed-off-by: NLeo Wen <leo.wen@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Leo Wen 提交于
Add the 'usbkbd' environment variable to the 'stdin', the contents of the keyboard input can be auto-displayed on the serial terminal,so you don't need to manually set the environment variable 'stdin'. Signed-off-by: NLeo Wen <leo.wen@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Leo Wen 提交于
Add four macros of CONFIG_USB_KEYBOARD,CONFIG_DM_KEYBOARD,etc in the firefly-rk3288_defconfig,can support usb keyboard device when these four macros are enabled. Signed-off-by: NLeo Wen <leo.wen@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT were previously enabled through rk3399_common.h. This change implies these options through Kconfig. These need to always be active for the RK3399, as follows: - SPL_SERIAL_SUPPORT is needed to pass the SPL build - SPL_DRIVERS_MISC_SUPPORT is needed to pass the SPL build Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Romain Perier 提交于
Currently, drive-strenght to 12ma are described and supposed to be used on RK3288. However, the pinctrl driver for this SoC only handles muxing and pull up/pull down via PU/PD control registers. So complex IPs like GMAC are working in normal ethernet 100mbps, but not at 1gbps typically. This commit adds support for handling drive-strength of 12ma, when it's defined in the DT. Signed-off-by: NRomain Perier <romain.perier@collabora.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Kever Yang 提交于
We use to use /dev/mmcbl0p7 as root partition, and pass it to kernel by cmdline, but the mmc number in kernel in not fixed, we need to change the bootargs to adapt it from time to time. We can use the UUID to fix it, the ID is from: https://www.freedesktop.org/wiki/Specifications/DiscoverablePartitionsSpec/ ARM 32bit: 69dad710-2ce4-4e3c-b16c-21a1d49abed3 ARM 64bit: b921b045-1df0-41c3-af44-4c6f280d3fae Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
When creating a EFI/GUID partition map for the RK3399-Q7 through U-Boot, the partition entries should be places at a 1MB offset from the start of the device to give us space for the environment (at 16KB on SD/MMC devices), the SPL stage (at 32KB on SD/MMC devices) and the image payload (at 256KB on SD/MMC devices). This change sets this up through the u-boot,efi-partition-entries-offset /config property in the RK3399-Q7 DTSI. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
As our SPL stage can grow quite large (80KB+ are not unusual) on the RK3399-Q7, the default setting for the environment location (in include/configs/rockchip-common.h) can overlap our SPL. This change finally makes use of the 'u-boot,mmc-env-offset' DTS property to override the environment location and put it at 16KB into the device, which is right before the SPL (located at 32KB). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
This removes the unused 'rate' field from both rk3399_pmuclk_priv and rk3399_clk_priv. I didn't bother to check where this came from (i.e. what the historical context of these was), but only verified that these are indeed unused across all code-paths. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The rk3368_clk_priv has two unused fields: rate, has_bwadj. This removes them as there's no need for either (i.e. has_bwadj is always true for the RK3368, according to its TRM). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The clk driver for the RK3368 picked the wrong data structure's size for its auto-alloc size: the size was calculated on the structure representing the CRU hardware block instead of the priv structure. As the CRU's register file is much larger than the driver's priv, this did not cause any pain (except wasting memory). Fix this by using the correct data structure's size. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
When building for a TPL/SPL setup (e.g. on the RK3368), we need the TPL stage to have the extra space for for the 'Rockchip SPL name' (i.e. 'RK33' word). Yet, the SPL will start execution at its first word (i.e. the first word in the SPL binary needs to be a valid instruction). To make things a bit more involved, CONFIG_SPL_BUILD is defined both for the SPL and the TPL stage. To avoid having to explicitly test for the first stage (TPL, if and only if TPL and SPL are built, SPL otherwise), this commit modifies the sequence to repeat the 'b reset' (instead of reserving 4 bytes of undefined space) at the start of the boot0 hook: if overwritten (and execution starts at the second word), the first instruction is still a 'b reset'... if not overwritten, we start on a 'b reset' as well. This solution wouldn't even require the check whether we are in the SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for documentation purposes. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Use mask to clear old setting before direct set the new config, or else there it will mess up the config when it's not the same with default value. Fixes: 38510598 rockchip: Setup default PWM flags Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Kever Yang 提交于
The regulator_enable() should be called from upper layer like regulators_enable_boot_on(), remove it from pwm regulator driver. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up typo in commit message:] Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Kever Yang 提交于
The rkpwm reg order has fixed by below patch: e3ef41df rockchip: pwm: fix the register layout for the PWM controller We need to correct the parameter order for pwm_set_config() to make the pwm regulator works correctly. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Kever Yang 提交于
Add regulator-init-microvolt for driver to init the regulator, and the min output value is not 800000mV for the PWM2 io domain has changed to VCC3V0 instead of VCC1V8 in rockchip evb, we need to correct it with the value measured when PWM2 output HIGH. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Kever Yang 提交于
According to my test, some of firefly-rk3399 hang after dram init when using ddr3-1333 config, while using ddr3-1600 config works for all the board I have test. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Wadim Egorov 提交于
The Identification Page (32 byte) is an additional page which can be written and (later) permanently locked in Read-only mode. phyCORE-RK3288 SoMs are using this page to describe the module variant. This page also contains a MAC. Our boards can be equipped with a different amount of EEPROMs. To make this more transparent let's add an alias for the eeprom which stores the module variant. Signed-off-by: NWadim Egorov <w.egorov@phytec.de> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Romain Perier 提交于
This reverts TXCLK toggling that was accidently dropped while reworking commit 2454b719 ("rockchip: rk3288: Add pinctrl support for the gmac ethernet interface"). So the TX clock is enabled and we can use GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled (!PINTRL_FULL). Fixes: 2454b719 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: NRomain Perier <romain.perier@collabora.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Romain Perier 提交于
We should not handle this pin explicitly from pinctrl. GMAC driver takes care of it by using a "reset-gpio" in the DT. This commit removes pull up for GPIO4B0. Fixes: 2454b719 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: NRomain Perier <romain.perier@collabora.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
This changes the rockchip-efuse driver to use dev_read_addr instead of devfdt_get_addr. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
We are about to reuse the rockchip timer (header file) for 64bit ARMv8 chips, so it seems a good time to make the register sizes explicit by changing from 'unsigned int' to 'u32'. Reorders the header-includes in rk_timer.c to ensure that 'u32' is definded before it is used by 'asm/arch/timer.h'. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Meng Dongyang 提交于
Add dwc2 node for fastboot to init dwc2 controller. Signed-off-by: NMeng Dongyang <daniel.meng@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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- 26 7月, 2017 6 次提交
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由 Bin Meng 提交于
This adds myself as one of the x86 maintainers. Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Tom Rini 提交于
In the source_file_format.txt file we talk about how to construct a valid FIT image. While it already says to look at the source for the full list, add kernel_noload to the explicit list of types. This is arguably the most important type to use as most often we are including a kernel that will run from wherever it is loaded into memory and execute. This for example, allows you to create a single FIT image for Linux that can be used on both OMAP and i.MX devices as the kernel will not need to be moved in memory. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Patrice Chotard 提交于
STM32F7 and H7 shared the same SDRAM control block. On STM32H7 few control bits has been added. The current driver need some minor adaptation as FMC block enable/disable for H7. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrice Chotard 提交于
FMC driver is now able to discover the bank number by parsing bank subnodes. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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