The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the compilation warnings.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add the clock support.
Note that the clock handling of the DBGU peripheral is different
from the USART.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add the uart init function to be used on both probe and the early
debug uart init. For the latter, the input clock should be from
CONFIG_DEBUG_UART_CLOCK.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Align the at91 pmc's compatibles with kernel.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>

Add the compatible "atmel,at91rm9200-clk-master" to align with
the kernel.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enhance the peripheral clock to support both at9sam9x5's and
at91rm9200's peripheral clock via the different compatibles.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add the compatibles to align with the kernel.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

To avoid the failure of mdio_register(), add the remove callback
to unregister the mii_dev when removing the ethernet device.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Fixed up unused variable warning, e.g. for gurnard:
Signed-off-by: NSimon Glass <sjg@chromium.org>

The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865, and
some power rails. The board is mainly used to measure the power
consumption. As all those changes are done in at91bootstrap,
in U-Boot, only use another device tree file, no code needed
to change.

As there is additional power consumption when enbling the USB
Host and USB device, for the power consumption measurement
intention, disable the USB host and device.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Fix the DDR2 configuration to make SPL work.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Enable config options to support the SPL, increase the malloc
memory size for the SPL and board_init_f stage and increase
the memory space for the SPL binary.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Remove the unnecessary header files.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Due to the pin configuration and clock enabling is handling by the
driver, remove the unneeded hardcode uart1 init during
board_early_init_f stage.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Because the MACB driver supports the driver model and device tree,
the pins configuration and clock enabling are handled by the
pinctrl driver and clock driver, remove this hardcoded init code.

The USB Ether init code is removed as well.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Enable CONFIG_DM_ETH to make MACB to support driver model.

Because the USB Ether doesn't support driver model so far,
remove this feature.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

Add clock property for uart1 node.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

- Remove "probe" function from sandbox wdt driver
- Fix include order

Fixes: 0753bc2d ("dm: Simple Watchdog uclass")
Signed-off-by: NMaxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
 applied)].
Signed-off-by: NTom Rini <trini@konsulko.com>

One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable TI_COMMON_CMD_OPTIONS on all keystone2 platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all dra7xx platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am57xx platforms.
Also sync with savedefconfig
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am43xx platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am335x platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
[trini: Re-sync, add in boneblack*, evm_hs_{norboot,spiboot,usbspl} configs]
Signed-off-by: NTom Rini <trini@konsulko.com>

Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

ARM errata 852421 and 852423 applies to r1p0, r1p1 and r1p2
revisions of Cortex-A17 processors. These workarounds
exist in Linux kernel and I thought it would be better
to add them in to U-Boot.
Signed-off-by: NNisal Menuka <nisalmenuka23@gmail.com>

Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.

The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.

The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.

So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable I2C driver in ast2500 Eval Board defconfig.
Also enable i2c command.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NHeiko Schocher <hs@denx.de>

Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable Pinctrl Driver in AST2500 Eval Board's defconfig
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.

Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.

To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.

Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.

These were the only users of the old Watchdog API, so that API is
removed.

This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>